This series absorbed "monitor/hmp: Automatically handle
gdb-xml exposed registers", thus version 2. Previous cover:
MonitorDef registers parsing is one of the oldest APIs in QEMU,
thus predates gdbstub and XML register files. The latters are
maintained by the GDB/binutils project and are more up-to-date.
Getting the target register list from them allows to expose
all accessible registers to the HMP commands.
This series adds gdb_get_register() to monitor to use XML
generated registers, and remove the legacy MonitorDef entries
which became unreachable.
First we need to have the SPARC target better follow the
gdb-xml API.
On top of that we remove more TARGET_LONG_BITS uses, replacing
ldtul_p() -> ldn_p() and gdb_get_regl() -> gdb_get_reg32/64(),
allowing to build various gdbstub.c files once. Few other meson
cleanups on the way.
Philippe Mathieu-Daudé (50):
target/ppc: Move user_only_helper.c to target_user_arch[] source set
target/ppc: Remove PPC_DEBUG_SPR left-over comment
target/i386: Inline GDB_FORCE_64 definition
target/avr: Fix typo in gdb-xml feature name
target/alpha: Document gdbstub register indexes
target/riscv: Extract monitor-related code to monitor.c
target/ppc: Fix CPUClass::gdb_num_core_regs value
target/ppc: Remove dead code depending on USE_APPLE_GDB
gdbstub: Always infer gdb_num_core_regs when using XML file
target/sparc: Introduce sparc_cpu_register_gdb_regs() stub
target/sparc: Restore 'gdb-xml/sparc64-cp0.xml'
target/sparc: Restore 'gdb-xml/sparc64-fpu.xml'
target/sparc: Restore 'gdb-xml/sparc64-cpu.xml'
target/sparc: Expose gdbstub registers to sparc32plus target
target/sparc: Expose gdbstub registers to sparc32 targets
monitor/hmp: Handle gdb-xml exposed registers via gdb_get_register()
target/sparc: Remove MonitorDef register entries available via gdbstub
target/i386: Remove MonitorDef register entries available via gdbstub
target/m68k: Remove MonitorDef register entries available via gdbstub
target/ppc: Remove MonitorDef register entries available via gdbstub
target/ppc: Extract monitor-related code to monitor.c
target/or1k: Use XML register definitions from GDB
target/riscv: Remove empty target_monitor_defs() symbol
target/sparc: Factor sparc_cpu_gdb_write_register() out
target/ppc: Replace ldtul_p() -> ldn_p()
target/mips: Replace ldtul_p() -> ldn_p()
target/riscv: Replace ldtul_p() -> ldn_p()
target/riscv: Remove unnecessary target_ulong type uses
target/i386: Replace ldtul_p() -> ldn_p()
target/i386: Expand 64-bit definitions when TARGET_LONG_BITS == 64
gdbstub: Remove ldtul*() macros
target/alpha: Expand gdb_get_regl() -> gdb_get_reg64()
target/hexagon: Expand gdb_get_regl() -> gdb_get_reg32()
target/rx: Expand gdb_get_regl() -> gdb_get_reg32()
target/sh4: Expand gdb_get_regl() -> gdb_get_reg32()
target/sparc: Expand gdb_get_regl() in gdb_get_rega()
gdbstub/helpers: Convert gdb_get_regl() macro to inlined helper
target/microblaze: Build 'gdbstub.c' once for system binaries
target/sh4: Build 'monitor.c' once for system binaries
target/sh4: Build 'gdbstub.c' once for system binaries
target/or1k: Rename 'openrisc' -> 'or1k' in meson.build
target/or1k: Build 'gdbstub.c' once for system single binary
target/alpha: Build 'gdbstub.c' once for system single binary
target/avr: Build 'gdbstub.c' once for system single binary
target/loongarch: Build 'gdbstub.c' once for system single binary
target/m68k: Build 'gdbstub.c' once for system single binary
target/rx: Build 'gdbstub.c' once for system single binary
target/s390x: Build 'gdbstub.c' once for system single binary
target/tricore: Build 'gdbstub.c' once for system single binary
DONOTREVIEW Revert "target/loongarch: Build 'gdbstub.c' once"
configs/targets/or1k-linux-user.mak | 1 +
configs/targets/or1k-softmmu.mak | 1 +
configs/targets/sparc-linux-user.mak | 1 +
configs/targets/sparc-softmmu.mak | 1 +
configs/targets/sparc32plus-linux-user.mak | 1 +
configs/targets/sparc64-linux-user.mak | 2 +-
configs/targets/sparc64-softmmu.mak | 2 +-
include/gdbstub/helpers.h | 28 +-
include/hw/core/cpu.h | 4 +-
target/ppc/cpu.h | 2 -
target/sparc/cpu.h | 1 +
gdbstub/gdbstub.c | 1 +
monitor/hmp.c | 49 ++-
target/alpha/cpu.c | 1 -
target/alpha/gdbstub.c | 27 +-
target/hexagon/gdbstub.c | 12 +-
target/i386/gdbstub.c | 23 +-
target/i386/monitor.c | 39 ---
target/m68k/monitor.c | 18 -
target/mips/gdbstub.c | 14 +-
target/or1k/cpu.c | 2 +-
target/ppc/cpu_init.c | 10 -
target/ppc/gdbstub.c | 146 +-------
target/ppc/monitor.c | 41 +++
target/ppc/ppc-qmp-cmds.c | 148 +-------
target/riscv/gdbstub.c | 20 +-
target/riscv/monitor.c | 135 ++++++++
target/riscv/riscv-qmp-cmds.c | 150 ---------
target/rx/gdbstub.c | 20 +-
target/sh4/gdbstub.c | 32 +-
target/sparc/cpu.c | 7 +-
target/sparc/gdbstub.c | 317 +++++++++++-------
target/sparc/monitor.c | 107 ------
gdb-xml/avr-cpu.xml | 2 +-
gdb-xml/or1k-core.xml | 65 ++++
gdb-xml/sparc32-cp0.xml | 18 +
gdb-xml/sparc32-cpu.xml | 42 +++
gdb-xml/sparc32-fpu.xml | 42 +++
gdb-xml/sparc64-cp0.xml | 16 +
gdb-xml/sparc64-cpu.xml | 42 +++
gdb-xml/{sparc64-core.xml => sparc64-fpu.xml} | 44 +--
target/alpha/meson.build | 14 +-
target/avr/meson.build | 5 +-
target/m68k/meson.build | 9 +-
target/microblaze/meson.build | 11 +-
target/or1k/meson.build | 23 +-
target/ppc/meson.build | 7 +-
target/rx/meson.build | 6 +-
target/s390x/meson.build | 3 +-
target/sh4/meson.build | 14 +-
target/tricore/meson.build | 10 +-
51 files changed, 836 insertions(+), 900 deletions(-)
create mode 100644 target/ppc/monitor.c
create mode 100644 gdb-xml/or1k-core.xml
create mode 100644 gdb-xml/sparc32-cp0.xml
create mode 100644 gdb-xml/sparc32-cpu.xml
create mode 100644 gdb-xml/sparc32-fpu.xml
create mode 100644 gdb-xml/sparc64-cp0.xml
create mode 100644 gdb-xml/sparc64-cpu.xml
rename gdb-xml/{sparc64-core.xml => sparc64-fpu.xml} (59%)
--
2.52.0
