This commit adds a MemoryRegion alias to support PSP access to TSP SDRAM through shared memory remapping, as defined by the default SCU configuration.
The TSP coprocessor exposes one DRAM alias: - remap maps PSP DRAM at 0x42e000000 (32MB) to TSP SDRAM offset 0x0 This region corresponds to the default SCU register value, which controls the mapping between PSP and coprocessor memory windows. Set TSP CPUID 5. SCU VMState version remains at 3, as it was already bumped in a previous commit. Signed-off-by: Jamin Lin <[email protected]> --- include/hw/misc/aspeed_scu.h | 1 + hw/arm/aspeed_ast27x0-fc.c | 2 ++ hw/arm/aspeed_ast27x0-tsp.c | 3 +++ hw/arm/aspeed_ast27x0.c | 2 ++ hw/misc/aspeed_scu.c | 17 ++++++++++++++++- 5 files changed, 24 insertions(+), 1 deletion(-) diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index 9c29ca217d..58fef73159 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -43,6 +43,7 @@ struct AspeedSCUState { MemoryRegion dram_remap_alias[3]; MemoryRegion *dram; int ssp_cpuid; + int tsp_cpuid; }; #define AST2400_A1_SILICON_REV 0x02010303U diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index 77ce312591..38c5d06077 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -102,6 +102,8 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp) sc->uarts_num, serial_hd(2)); object_property_set_int(OBJECT(&s->ca35), "ssp-cpuid", 4, &error_abort); + object_property_set_int(OBJECT(&s->ca35), "tsp-cpuid", 5, + &error_abort); if (!qdev_realize(DEVICE(&s->ca35), NULL, errp)) { return false; } diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c index b99b18bc6e..6c0f166a34 100644 --- a/hw/arm/aspeed_ast27x0-tsp.c +++ b/hw/arm/aspeed_ast27x0-tsp.c @@ -198,6 +198,9 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU], &s->scu_alias); + /* SDRAM remap alias used by PSP to access TSP SDRAM */ + memory_region_add_subregion(&s->sdram, 0, &s->scu->dram_remap_alias[2]); + /* INTC */ if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) { return; diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index b914c01825..52cd2bcbe7 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -434,6 +434,8 @@ static void aspeed_soc_ast2700_init(Object *obj) "hw-prot-key"); object_property_add_alias(obj, "ssp-cpuid", OBJECT(&s->scu), "ssp-cpuid"); + object_property_add_alias(obj, "tsp-cpuid", OBJECT(&s->scu), + "tsp-cpuid"); object_initialize_child(obj, "scuio", &s->scuio, TYPE_ASPEED_2700_SCUIO); qdev_prop_set_uint32(DEVICE(&s->scuio), "silicon-rev", diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 84fe88e58b..9bfe132840 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -616,6 +616,7 @@ static const Property aspeed_scu_properties[] = { DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap2, 0), DEFINE_PROP_UINT32("hw-prot-key", AspeedSCUState, hw_prot_key, 0), DEFINE_PROP_INT32("ssp-cpuid", AspeedSCUState, ssp_cpuid, -1), + DEFINE_PROP_INT32("tsp-cpuid", AspeedSCUState, tsp_cpuid, -1), DEFINE_PROP_LINK("dram", AspeedSCUState, dram, TYPE_MEMORY_REGION, MemoryRegion *), }; @@ -874,7 +875,7 @@ static const TypeInfo aspeed_2600_scu_info = { static void aspeed_2700_scu_dram_remap_alias_init(AspeedSCUState *s, Error **errp) { - if (s->ssp_cpuid > 0) { + if (s->ssp_cpuid > 0 || s->tsp_cpuid > 0) { if (!s->dram) { error_setg(errp, TYPE_ASPEED_2700_SCU ": 'dram' link not set"); return; @@ -898,6 +899,20 @@ static void aspeed_2700_scu_dram_remap_alias_init(AspeedSCUState *s, "ssp.dram.remap2", s->dram, 0x2c000000, 32 * MiB); } + + if (s->tsp_cpuid > 0) { + /* + * The TSP coprocessor uses one memory alias (remap) to access a shared + * region in the PSP DRAM: + * + * - remap maps PSP DRAM at 0x42e000000 (size: 32MB) to TSP SDRAM + * offset 0x0 + * + */ + memory_region_init_alias(&s->dram_remap_alias[2], OBJECT(s), + "tsp.dram.remap", s->dram, + 0x2e000000, 32 * MiB); + } } static uint64_t aspeed_ast2700_scu_read(void *opaque, hwaddr offset, -- 2.43.0
