On Mon, Jun 18, 2012 at 8:28 AM, 陳韋任 (Wei-Ren Chen) <che...@iis.sinica.edu.tw> wrote: >> The reason why we want to do the measuring is we want to use KVM (sounds >> crazy >> idea) MMU virtualization to speedup the guest -> host memory address >> translation. >> I talked to some people on LinuxCon Japan, included Paolo, about this idea. >> The >> feedback I got is we can only use shadow page table rather than EPT/NPT to do >> the address translation (if possible!) since different ISA (ARM and x86, for >> example) have different page table format. Besides, QEMU has to use ioctl to >> ask >> KVM to get the translation result, but it's an overkill as the ARM page table >> is quite simple, which can be done in user mode very fast. > > Anyone would like to give a comment on this? ;) > > From the talk with Laurent on #qemu, he said the way he thought of is > translating GVA -> GPA manually (through software), then try to insert > GPA -> HPA into EPT, that's the only way HW can help.
For some 32 bit guests on some 64 bit hosts, maybe KVM could indeed help. Just map the whole 4G guest virtual address space so that guest memory accesses can be turned 1:1 into raw direct accesses. I/O pages would be unmapped, accesses handled via fault path. This of course depends on guest and host MMU models being sufficiently similar (esp. page size). > > Regards, > chenwj > > -- > Wei-Ren Chen (陳韋任) > Computer Systems Lab, Institute of Information Science, > Academia Sinica, Taiwan (R.O.C.) > Tel:886-2-2788-3799 #1667 > Homepage: http://people.cs.nctu.edu.tw/~chenwj >
