On Wed, Feb 25, 2026 at 07:08:02PM +0800, Max Chou wrote: > The OCP FP8 E4M3 format has only a single NaN encoding (0x7F/0xFF), > Replace the indirect check via parts_is_snan_frac with a direct > check of no_signaling_nans to make the intent clearer. > > Signed-off-by: Max Chou <[email protected]> > --- > fpu/softfloat-parts.c.inc | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc > index 3c323c0cec..5ef7e2d921 100644 > --- a/fpu/softfloat-parts.c.inc > +++ b/fpu/softfloat-parts.c.inc > @@ -245,8 +245,8 @@ static void partsN(canonicalize)(FloatPartsN *p, > float_status *status, > case float_expmax_e4m3: > if (p->frac_hi == 0b111) { > frac_shl(p, fmt->frac_shift); > - p->cls = (parts_is_snan_frac(p->frac_hi, status) > - ? float_class_snan : float_class_qnan); > + p->cls = no_signaling_nans(status) ? float_class_qnan : > + float_class_snan; > return; > } > /* otherwise normal */ > -- > 2.52.0 > >
Reviewed-by: Chao Liu <[email protected]> Thanks, Chao
