From: Richard Henderson <[email protected]> Introduce a set of stub property callbacks for when we really don't want to be able to enable SVE. Register the real or stub funtions in aarch64_add_sve_properties depending on whether or not SVE is available.
Adjust aarch64_a64fx_initfn to initialize the set of supported vector sizes before calling aarch64_add_sve_properties. Signed-off-by: Richard Henderson <[email protected]> Reviewed-by: Peter Maydell <[email protected]> Message-id: [email protected] Signed-off-by: Peter Maydell <[email protected]> --- target/arm/cpu64.c | 48 ++++++++++++++++++++++++++++++++++++------ target/arm/tcg/cpu64.c | 2 +- 2 files changed, 42 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 209ab5c344..58215216c5 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -300,6 +300,30 @@ static void cpu_arm_set_vq(Object *obj, Visitor *v, const char *name, vq_map->init |= 1 << (vq - 1); } +static void prop_bool_get_false(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool value = false; + visit_type_bool(v, name, &value, errp); +} + +static void prop_bool_set_false(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool value; + + if (visit_type_bool(v, name, &value, errp) && value) { + error_setg(errp, "'%s' feature not supported by %s on this host", + name, current_accel_name()); + } +} + +static void prop_add_stub_bool(Object *obj, const char *name) +{ + object_property_add(obj, name, "bool", prop_bool_get_false, + prop_bool_set_false, NULL, NULL); +} + static bool cpu_arm_get_sve(Object *obj, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); @@ -309,12 +333,6 @@ static bool cpu_arm_get_sve(Object *obj, Error **errp) static void cpu_arm_set_sve(Object *obj, bool value, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); - - if (value && kvm_enabled() && !kvm_arm_sve_supported()) { - error_setg(errp, "'sve' feature not supported by KVM on this host"); - return; - } - FIELD_DP64_IDREG(&cpu->isar, ID_AA64PFR0, SVE, value); } @@ -471,7 +489,23 @@ void aarch64_add_sve_properties(Object *obj) ARMCPU *cpu = ARM_CPU(obj); uint32_t vq; - object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve); + /* + * For hw virtualization, we have already probed the set of vector + * lengths supported. If there are none, the host doesn't support + * SVE at all. In which case we register a stub property, to allow + * -cpu max,sve=off + * to always be valid. + * + * For TCG, this function is only called for cpu models which + * support SVE. The error message in the stub is written + * assuming host virtualiation is being used. + */ + if (cpu->sve_vq.supported) { + object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve); + } else { + assert(!tcg_enabled()); + prop_add_stub_bool(obj, "sve"); + } for (vq = 1; vq <= ARM_MAX_VQ; ++vq) { char name[8]; diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index fa80e48d2b..84857fb706 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -524,10 +524,10 @@ static void aarch64_a64fx_initfn(Object *obj) cpu->gic_pribits = 5; /* The A64FX supports only 128, 256 and 512 bit vector lengths */ - aarch64_add_sve_properties(obj); cpu->sve_vq.supported = (1 << 0) /* 128bit */ | (1 << 1) /* 256bit */ | (1 << 3); /* 512bit */ + aarch64_add_sve_properties(obj); cpu->isar.reset_pmcr_el0 = 0x46014040; -- 2.43.0
