This is the same as an indirect jump, just with immediate operand. The requirement of W=0 and 0x67 are already available in the decoder.
Signed-off-by: Paolo Bonzini <[email protected]> --- target/i386/tcg/decode-new.h | 3 +++ target/i386/tcg/decode-new.c.inc | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/target/i386/tcg/decode-new.h b/target/i386/tcg/decode-new.h index c974ca9d7c5..4998712e86d 100644 --- a/target/i386/tcg/decode-new.h +++ b/target/i386/tcg/decode-new.h @@ -184,6 +184,9 @@ typedef enum X86InsnCheck { /* No REX2 prefix allowed */ X86_CHECK_no_rex2 = 8192, + + /* No 0x67 prefix allowed */ + X86_CHECK_no_adr = 16384, } X86InsnCheck; typedef enum X86InsnSpecial { diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc index 9ee69564ab1..d8a5025ac07 100644 --- a/target/i386/tcg/decode-new.c.inc +++ b/target/i386/tcg/decode-new.c.inc @@ -1990,6 +1990,7 @@ static const X86OpEntry opcodes_root[256] = { #ifdef TARGET_X86_64 static const X86OpEntry opcodes_rex2_map0_A0toAF[16] = { + [1] = X86_OP_ENTRY1(JMP_m, I,q, p_00 chk2(W0, no_adr)), }; static void decode_REX2(DisasContext *s, CPUX86State *env, X86OpEntry *entry, uint8_t *b, @@ -3072,6 +3073,9 @@ static void disas_insn(DisasContext *s, CPUState *cpu) if ((decode.e.check & X86_CHECK_no_rex2) && (s->prefix & PREFIX_REX2)) { goto illegal_op; } + if ((decode.e.check & X86_CHECK_no_adr) && (s->prefix & PREFIX_ADR)) { + goto illegal_op; + } if ((decode.e.check & X86_CHECK_VEX128) && s->vex_l) { goto illegal_op; } -- 2.52.0
