On 10/02/26 7:16 pm, Caleb Schlossin wrote:
OCCFLG are scratch registers that can be shared with OCC firmware.
Log reads and writes to the registers as a reminder when we run
into more OCC code.
Add RW, WO_CLEAR and WO_OR SCOM Type enums in pnv_occ.c
Reviewed-by: Chalapathi V <[email protected]
Reviewed-by: Glenn Miles<[email protected]>
Reviewed-by: Aditya Gupta<[email protected]>
Signed-off-by: Chalapathi V<[email protected]>
Signed-off-by: Caleb Schlossin<[email protected]>
---
hw/ppc/pnv_occ.c | 55 +++++++++++++++++++++++++++++++++++++---
include/hw/ppc/pnv_occ.h | 4 +++
2 files changed, 56 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c
index 64cab3e9dc..b9f69daffc 100644
--- a/hw/ppc/pnv_occ.c
+++ b/hw/ppc/pnv_occ.c
@@ -195,6 +195,49 @@ static const TypeInfo pnv_occ_power8_type_info = {
#define P9_OCB_OCI_OCCMISC_CLEAR 0x6081
#define P9_OCB_OCI_OCCMISC_OR 0x6082
+/* OCC scratch registers for flag setting */
+#define P9_OCCFLG0 0x60ac
+#define P9_OCCFLG7_OR 0x60c3
+
+enum ScomType {
+ SCOM_TYPE_RW = 0,
+ SCOM_TYPE_WO_CLEAR = 1,
+ SCOM_TYPE_WO_OR = 2,
+};
+
Would be more suitable to place above macros, enum in pnv_occ.h,
but that's trivial and can be taken care as a separate patch later.
Queued patch 1,3.
