On 3/3/26 17:11, Anton Johansson via qemu development wrote:
Reviewed-by: Helge Deller <[email protected]>
Signed-off-by: Anton Johansson <[email protected]>
---
target/hppa/cpu.h | 11 ++++++++---
hw/hppa/machine.c | 4 ++--
hw/pci-host/astro.c | 2 +-
target/hppa/cpu.c | 9 ++++++++-
target/hppa/mem_helper.c | 39 +++++++++++----------------------------
5 files changed, 30 insertions(+), 35 deletions(-)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 5d0d4de09e..bb6b7dc76c 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -181,12 +181,12 @@ static uint64_t linux_kernel_virt_to_phys(void *opaque,
uint64_t addr)
static uint64_t translate_pa10(void *dummy, uint64_t addr)
{
- return hppa_abs_to_phys_pa1x(addr);
+ return hppa_abs_to_phys_pa1x(cpu_env(first_cpu), addr);
I'm not keen of these @first_cpu uses (for heterogeneous emulation
we want to restrict this variable to accel/, and poison it elsewhere
like in hw/). Can we resolve earlier or pass CPUState* around?
}
static uint64_t translate_pa20(void *dummy, uint64_t addr)
{
- return hppa_abs_to_phys_pa2_w0(addr);
+ return hppa_abs_to_phys_pa2_w0(cpu_env(first_cpu), addr);
}
static HPPACPU *cpu[HPPA_MAX_CPUS];
diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c
index 00a904277c..d38f81e553 100644
--- a/hw/pci-host/astro.c
+++ b/hw/pci-host/astro.c
@@ -303,7 +303,7 @@ static IOMMUTLBEntry
astro_translate_iommu(IOMMUMemoryRegion *iommu,
* language which not-coincidentally matches the PSW.W=0 mapping.
*/
if (addr <= UINT32_MAX) {
- entry = hppa_abs_to_phys_pa2_w0(addr);
+ entry = hppa_abs_to_phys_pa2_w0(cpu_env(first_cpu), addr);
} else {
entry = addr;
}
- * CPU model Physical address space bits
- * PA-7000--7300LC 32
- * PA-8000--8600 40
- * PA-8700--8900 44
- *
- * FIXME: However, the SeaBIOS firmware that is that tested against
- * uses 40-bit physical addresses, despite supposedly running a C3700
- * with a PA-8700 cpu, so use 40-bits for 64-bit.
- */
-#define HPPA_PHYS_ADDR_SPACE_BITS_PA20 40
-#define HPPA_PHYS_ADDR_SPACE_BITS_PA1X 32
-
-hwaddr hppa_abs_to_phys_pa1x(vaddr addr)
+hwaddr hppa_abs_to_phys_pa1x(CPUHPPAState *env, vaddr addr)
{
- return extract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA1X);
+ return extract64(addr, 0, hppa_phys_addr_bits(env));
}
-hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)
+hwaddr hppa_abs_to_phys_pa2_w1(CPUHPPAState *env, vaddr addr)
{
/*
* Figure H-8 "62-bit Absolute Accesses when PSW W-bit is 1" describes
@@ -64,11 +47,11 @@ hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)
* Since the supported physical address space is below 54 bits, the
* H-8 algorithm is moot and all that is left is to truncate.
*/
- QEMU_BUILD_BUG_ON(HPPA_PHYS_ADDR_SPACE_BITS_PA20 > 54);
- return sextract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);
+ const uint8_t pa = hppa_phys_addr_bits(env);
+ return sextract64(addr, 0, pa);
}
-hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)
+hwaddr hppa_abs_to_phys_pa2_w0(CPUHPPAState *env, vaddr addr)
{
/*
* See Figure H-10, "Absolute Accesses when PSW W-bit is 0",
@@ -89,7 +72,7 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)
* is what can be seen on physical machines too.
*/
addr = (uint32_t)addr;
- addr |= -1ull << (HPPA_PHYS_ADDR_SPACE_BITS_PA20 - 4);
+ addr |= -1ull << (hppa_phys_addr_bits(env) - 4);
}
return addr;
}
@@ -233,13 +216,13 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr
addr, int mmu_idx,
if (MMU_IDX_MMU_DISABLED(mmu_idx)) {
switch (mmu_idx) {
case MMU_ABS_W_IDX:
- phys = hppa_abs_to_phys_pa2_w1(addr);
+ phys = hppa_abs_to_phys_pa2_w1(env, addr);
break;
case MMU_ABS_IDX:
if (hppa_is_pa20(env)) {
- phys = hppa_abs_to_phys_pa2_w0(addr);
+ phys = hppa_abs_to_phys_pa2_w0(env, addr);
} else {
- phys = hppa_abs_to_phys_pa1x(addr);
+ phys = hppa_abs_to_phys_pa1x(env, addr);
}
break;
default:
@@ -580,7 +563,7 @@ static void itlbt_pa20(CPUHPPAState *env, target_ulong r1,
/* Align per the page size. */
ent->pa &= TARGET_PAGE_MASK << mask_shift;
/* Ignore the bits beyond physical address space. */
- ent->pa = sextract64(ent->pa, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);
+ ent->pa = sextract64(ent->pa, 0, hppa_phys_addr_bits(env));
ent->t = extract64(r2, 61, 1);
ent->d = extract64(r2, 60, 1);
