Hi,

This series expands Alpha's use of the QEMU Object Model.
Currently, Typhoon's typhoon_init() serves as both
instance_init and realize for the chipset. The helper takes
several arguments that are passed to it by the machine (in
clipper_init()); to QOMify Typhoon and give them proper
hooks, this series incrementally eliminates all of the
parameters of typhoon_init().

But first, some small cleanups of checkpatch.pl style problems
and input validation in Patches 1-3.

Part of the motivation behind the series was to get Alpha
ready for the Resettable Interface, and Patch 4 helps with that
by using rom_add_blob_fixed() so that the initrd parameters are
in-place upon reset (once that is possible).

Patches 5 and on begin the QOMification process in earnest:
To begin, we define an instance_init skeleton that adds property
links for the CPUs to point to Typhoon's cchip.cpu elements and
some plumbing. Next, to parent the CPUs to the machine in
clipper_init() and remove the `cpus` array from the typhoon_init()
signature, we replace cpu_create invocations with object_new(),
add them as children, and set their links. Since we iterate over
the CPUs, we took this route instead of multiple DEFINE_PROP_LINKs
in a Property array.

Note: Patch 8 (the final CPU patch) eliminates `cpus` from the
init helper's (typhoon_init) prototype but also add a TyphoonState
pointer to it, because we'll need it until the end of the series
when all the remaining parameters have been eliminated.

Patch 9 replaces the two qemu_irq pointers in typhoon_init() with
qdev_{get,init}_gpio_in_named() invocations.

Ten deals with RAM; here, we use the DEFINE_PROP_LINK macro in a
Property array since we only need to add and set the link property
to the existing machine->ram.

Patches 11-13: Since the Typhoon expects a function pointer and a
static configuration value to be provided to it (via typhoon_init)
by the board, we extend the TyphoonClass definition to hold these
as members: the PCI IRQ mapper and minimum PCI device slot,
respectively; in the Clipper, we define the Typhoon subclass
(TYPHOON_PCIHOST_CLIPPER) such that it assigns both of these
hardware constants in the (sub)class_init.
After this leg of the series, typhoon_init() only has the
TyphoonState pointer remaining as a parameter; it needs
this, because it still realizes the bus among other things.

Patch 14: So that we could move the realize out of typhoon_init(),
first we need to be able to extract the PCI bus that it returns.
We do this in clipper_init() using QOM path resolution via
object_resolve_path_component().

Patch 15: Finally, with the return value and other parameters
eliminated, we can split the logic of typhoon_init() into its
instance_init and realize hooks, and replace it with
sysbus_realize_and_unref() in clipper_init(). Huzzah!

Thanks,
Yodel

---
Yodel Eldar (15):
      hw/alpha/typhoon: Fix whitespace and block comment style problems
      hw/alpha/dp264: Fix block comment style problems
      hw/alpha/dp264: Validate kernel and initrd sizes
      hw/alpha/dp264: Use rom_add_blob_fixed() for initrd params
      hw/alpha/typhoon: Create instance_init and class_init
      hw/alpha/dp264: Add CPUs as children of the machine
      hw/alpha: Use QOM composition for the Typhoon chipset
      hw/alpha: Set CPU link properties and use them
      hw/alpha: Convert IRQ pointers to named GPIOs
      hw/alpha: Expose RAM to typhoon via QOM property link
      hw/alpha: Explicitly define TyphoonClass in alpha_sys.h
      hw/alpha: Move PCI IRQ mapping to TyphoonClass subclass
      hw/alpha: Move minimum PCI device slot to TyphoonClass
      hw/alpha: Use QOM path resolution to get Typhoon PCI bus
      hw/alpha: Split typhoon_init() into instance_init and realize

 hw/alpha/alpha_sys.h |  18 +++-
 hw/alpha/dp264.c     | 121 ++++++++++++++++++++-------
 hw/alpha/typhoon.c   | 226 +++++++++++++++++++++++++++++++--------------------
 3 files changed, 249 insertions(+), 116 deletions(-)
---
base-commit: 63ec1f769490d8371fd03220eaede91cc7dd7c80
change-id: 20260310-qomify-alpha-65135464492d


Reply via email to