Add OpenRISC int instruction helpers. Signed-off-by: Jia Liu <pro...@gmail.com> --- target-openrisc/Makefile.objs | 2 +- target-openrisc/helper.h | 5 +++ target-openrisc/int_helper.c | 85 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 91 insertions(+), 1 deletion(-) create mode 100644 target-openrisc/int_helper.c
diff --git a/target-openrisc/Makefile.objs b/target-openrisc/Makefile.objs index 382190a..4286462 100644 --- a/target-openrisc/Makefile.objs +++ b/target-openrisc/Makefile.objs @@ -1,3 +1,3 @@ obj-$(CONFIG_SOFTMMU) += machine.o obj-y += cpu.o excp.o intrpt.o mmu.o translate.o -obj-y += excp_helper.o intrpt_helper.o mmu_helper.o +obj-y += excp_helper.o int_helper.o intrpt_helper.o mmu_helper.o diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h index 4e2a49f..c772951 100644 --- a/target-openrisc/helper.h +++ b/target-openrisc/helper.h @@ -22,6 +22,11 @@ /* exception */ DEF_HELPER_FLAGS_2(exception, 0, void, env, i32) +/* int */ +DEF_HELPER_FLAGS_1(ff1, 0, tl, tl) +DEF_HELPER_FLAGS_1(fl1, 0, tl, tl) +DEF_HELPER_FLAGS_3(mul32, 0, tl, env, tl, tl) + /* interrupt */ DEF_HELPER_FLAGS_1(rfe, 0, void, env) diff --git a/target-openrisc/int_helper.c b/target-openrisc/int_helper.c new file mode 100644 index 0000000..09cd70a --- /dev/null +++ b/target-openrisc/int_helper.c @@ -0,0 +1,85 @@ +/* + * OpenRISC int helper routines + * + * Copyright (c) 2011-2012 Jia Liu <pro...@gmail.com> + * Feng Gao <gf91...@gmail.com> + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +#include "cpu.h" +#include "helper.h" +#include "excp.h" + +target_ulong HELPER(ff1)(target_ulong x) +{ + target_ulong n = 0; + + if (x == 0) { + return 0; + } + + for (n = 32; x; n--) { + x <<= 1; + } + return n+1; +} + +target_ulong HELPER(fl1)(target_ulong x) +{ + target_ulong n = 0; + + if (x == 0) { + return 0; + } + + for (n = 0; x; n++) { + x >>= 1; + } + return n; +} + +target_ulong HELPER(mul32)(CPUOpenRISCState *env, + target_ulong ra, target_ulong rb) +{ + uint64_t result; + target_ulong high, cy; + + result = ra * rb; + /* regisiers in or32 is 32bit, so 32 is NOT a magic number. + or64 is not handled in this function, and not implement yet, + TARGET_LONG_BITS for or64 is 64, it will break this function, + so, we didn't use TARGET_LONG_BITS here. */ + high = result >> 32; + cy = result >> (32 - 1); + + if ((cy & 0x1) == 0x0) { + if (high == 0x0) { + return result; + } + } + + if ((cy & 0x1) == 0x1) { + if (high == 0xffffffff) { + return result; + } + } + + env->sr |= (SR_OV | SR_CY); + if (env->sr & SR_OVE) { + raise_exception(env, EXCP_RANGE); + } + + return result; +} -- 1.7.9.5
