This is Part 1 of the hexagon system emulation (sysemu) patch series,
providing the foundational target infrastructure needed for full-system
emulation of the Qualcomm Hexagon DSP.
Changes since v4:
- Moved lock infrastructure (hex_lock_state_t enum, lock fields,
CPU_INTERRUPT_*_UNLOCK) and TLB lock macros into "Add stubs for
modify_ssr/get_exe_mode" where they are first used
- Renamed "Add locks, id, next_PC to state" to "Add cpu modes, mmu
indices, next_PC to state" to reflect remaining content
- Removed hvx_contexts field and hvx-contexts property from this
series
- Used G_GNUC_UNUSED instead of (void) casts to suppress
unused-variable warnings for sysemu source register numbers
in hex_common.py
Previous versions:
v4:
https://lore.kernel.org/qemu-devel/[email protected]/
v3:
https://lore.kernel.org/qemu-devel/[email protected]/
v2:
https://lore.kernel.org/qemu-devel/[email protected]/
v1:
https://lore.kernel.org/qemu-devel/[email protected]/
Brian Cain (35):
docs: Add hexagon sysemu docs
docs/system: Add hexagon CPU emulation
target/hexagon: Fix badva reference, delete CAUSE
target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof
target/hexagon: Handle system/guest registers in gen_analyze_funcs.py
and hex_common.py
target/hexagon: Suppress unused-variable warnings for sysemu source
regs
target/hexagon: Make gen_exception_end_tb non-static
target/hexagon: Switch to tag_ignore(), generate via
get_{user,sys}_tags()
target/hexagon: Add privilege check, use tag_ignore()
target/hexagon: Add a placeholder fp exception
target/hexagon: Add guest, system reg number defs
target/hexagon: Add guest, system reg number state
target/hexagon: Add TCG values for sreg, greg
target/hexagon: Add guest/sys reg writes to DisasContext
target/hexagon: Add imported macro, attr defs for sysemu
target/hexagon: Add new macro definitions for sysemu
target/hexagon: Add handlers for guest/sysreg r/w
target/hexagon: Add placeholder greg/sreg r/w helpers
target/hexagon: Add vmstate representation
target/hexagon: Make A_PRIV, "J2_trap*" insts need_env()
target/hexagon: Define register fields for system regs
target/hexagon: Implement do_raise_exception()
target/hexagon: Add system reg insns
target/hexagon: Add sysemu TCG overrides
target/hexagon: Add implicit attributes to sysemu macros
target/hexagon: Add TCG overrides for int handler insts
target/hexagon: Add TCG overrides for thread ctl
target/hexagon: Add TCG overrides for rte, nmi
target/hexagon: Add sreg_{read,write} helpers
target/hexagon: Add cpu modes, mmu indices, next_PC to state
hw/hexagon: Introduce hexagon TLB device
target/hexagon: Add stubs for modify_ssr/get_exe_mode
target/hexagon: Add clear_wait_mode() definition
target/hexagon: Define f{S,G}ET_FIELD macros
target/hexagon: Add hex_interrupts support
MAINTAINERS | 3 +
docs/devel/hexagon-sys.rst | 112 ++++++
docs/devel/index-internals.rst | 1 +
docs/system/hexagon/cdsp.rst | 12 +
docs/system/hexagon/emulation.rst | 15 +
docs/system/target-hexagon.rst | 103 +++++
docs/system/targets.rst | 1 +
include/hw/hexagon/hexagon_tlb.h | 45 +++
target/hexagon/cpu-param.h | 4 +
target/hexagon/cpu.h | 72 +++-
target/hexagon/cpu_bits.h | 75 +++-
target/hexagon/cpu_helper.h | 21 ++
target/hexagon/gen_tcg.h | 9 +
target/hexagon/gen_tcg_sys.h | 102 +++++
target/hexagon/helper.h | 22 ++
target/hexagon/hex_interrupts.h | 15 +
target/hexagon/hex_mmu.h | 25 ++
target/hexagon/hex_regs.h | 117 ++++++
target/hexagon/internal.h | 18 +
target/hexagon/macros.h | 35 +-
target/hexagon/sys_macros.h | 240 ++++++++++++
target/hexagon/translate.h | 43 +++
target/hexagon/attribs_def.h.inc | 49 ++-
target/hexagon/reg_fields_def.h.inc | 96 +++++
hw/hexagon/hexagon_tlb.c | 463 +++++++++++++++++++++++
linux-user/hexagon/cpu_loop.c | 16 +
target/hexagon/arch.c | 5 +
target/hexagon/cpu.c | 56 ++-
target/hexagon/cpu_helper.c | 85 +++++
target/hexagon/genptr.c | 151 ++++++++
target/hexagon/hex_interrupts.c | 375 ++++++++++++++++++
target/hexagon/hex_mmu.c | 277 ++++++++++++++
target/hexagon/machine.c | 32 ++
target/hexagon/op_helper.c | 144 ++++++-
target/hexagon/translate.c | 30 +-
target/hexagon/gen_analyze_funcs.py | 14 +-
target/hexagon/gen_helper_funcs.py | 26 +-
target/hexagon/gen_helper_protos.py | 23 +-
target/hexagon/gen_idef_parser_funcs.py | 2 +
target/hexagon/gen_op_attribs.py | 2 +-
target/hexagon/gen_opcodes_def.py | 5 +-
target/hexagon/gen_tcg_funcs.py | 35 +-
target/hexagon/hex_common.py | 181 ++++++++-
target/hexagon/imported/encode_pp.def | 128 ++++++-
target/hexagon/imported/macros.def | 482 +++++++++++++++++++++++-
target/hexagon/imported/system.idef | 244 +++++++++++-
target/hexagon/meson.build | 13 +-
47 files changed, 3914 insertions(+), 110 deletions(-)
create mode 100644 docs/devel/hexagon-sys.rst
create mode 100644 docs/system/hexagon/cdsp.rst
create mode 100644 docs/system/hexagon/emulation.rst
create mode 100644 docs/system/target-hexagon.rst
create mode 100644 include/hw/hexagon/hexagon_tlb.h
create mode 100644 target/hexagon/cpu_helper.h
create mode 100644 target/hexagon/gen_tcg_sys.h
create mode 100644 target/hexagon/hex_interrupts.h
create mode 100644 target/hexagon/hex_mmu.h
create mode 100644 target/hexagon/sys_macros.h
create mode 100644 hw/hexagon/hexagon_tlb.c
create mode 100644 target/hexagon/cpu_helper.c
create mode 100644 target/hexagon/hex_interrupts.c
create mode 100644 target/hexagon/hex_mmu.c
create mode 100644 target/hexagon/machine.c
mode change 100755 => 100644 target/hexagon/imported/macros.def
--
2.34.1
