On Mon, 23 Feb 2026 17:02:09 +0000 Peter Maydell <[email protected]> wrote:
> The GICv5 devicetree binding specifies the "interrupts" property > differently to GICv2 and GICv3 for PPIs: the first field is the > architectural INTID.TYPE, and the second is the architectural > INTID.ID. (The third field defining the level/edge trigger mode has > the same values for GICv5 as it did for the older GICs.) > > In the places in the virt board where we wire up PPIs (the timer and > the PMU), handle the GICv5: > > * use the architectural constant GICV5_PPI for the type > * use the architected GICv5 PPI numbers for the interrupt sources > (which differ from the old ones and don't need to be adjusted via > INTID_TO_PPI()) > * leave the irqflags as-is > > Add some commentary in our include/hw/arm/fdt.h file about what the > the constants defined there are valid for. > > Signed-off-by: Peter Maydell <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]>
