On Thu, Mar 12, 2026 at 11:43 PM James Wainwright <[email protected]> wrote: > > > Looks good but you didn't change the names in the commit titles, > probably worth updating those as well > > Good catch, I missed those messages. Updated. > > Thanks for the reviews! > > James Wainwright (3): > util: export CRC32[C] lookup tables > target/riscv: add draft RISC-V Zbr ext as xbr0p93 > disas: diassemble RISC-V xlrbr (crc32) instructions
Thanks! Applied to riscv-to-apply.next Alistair > > MAINTAINERS | 5 +- > disas/meson.build | 3 +- > disas/riscv-xlrbr.c | 79 +++++++++++++++++++++ > disas/riscv-xlrbr.h | 19 +++++ > disas/riscv.c | 2 + > include/qemu/crc32.h | 18 +++++ > include/qemu/crc32c.h | 1 + > target/riscv/bitmanip_helper.c | 20 ++++++ > target/riscv/cpu.c | 4 +- > target/riscv/cpu_cfg.h | 1 + > target/riscv/cpu_cfg_fields.h.inc | 1 + > target/riscv/helper.h | 2 + > target/riscv/insn_trans/trans_xlrbr.c.inc | 45 ++++++++++++ > target/riscv/meson.build | 1 + > target/riscv/translate.c | 3 + > target/riscv/xlrbr.decode | 30 ++++++++ > tests/tcg/riscv64/Makefile.softmmu-target | 5 ++ > tests/tcg/riscv64/test-crc32.S | 64 +++++++++++++++++ > util/crc32.c | 85 +++++++++++++++++++++++ > util/crc32c.c | 4 +- > util/meson.build | 1 + > 21 files changed, 388 insertions(+), 5 deletions(-) > create mode 100644 disas/riscv-xlrbr.c > create mode 100644 disas/riscv-xlrbr.h > create mode 100644 include/qemu/crc32.h > create mode 100644 target/riscv/insn_trans/trans_xlrbr.c.inc > create mode 100644 target/riscv/xlrbr.decode > create mode 100644 tests/tcg/riscv64/test-crc32.S > create mode 100644 util/crc32.c > > -- > 2.48.1 > >
