On 3/5/2026 2:07 AM, Zide Chen wrote:
> - 64-bit DS Area (CPUID.01H:ECX[2]) depends on DS (CPUID.01H:EDX[21]).
> - When PMU is disabled, Debug Store must not be exposed to the guest,
> which implicitly disables legacy DS-based PEBS.
>
> Signed-off-by: Zide Chen <[email protected]>
> ---
> V3:
> - Update title to be more accurate.
> - Make DTES64 depend on DS.
> - Mark MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL in previous patch.
> - Clean up the commit message.
>
> V2: New patch.
> ---
> target/i386/cpu.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 2e1dea65d708..3ff9f76cf7da 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1899,6 +1899,10 @@ static FeatureDep feature_dependencies[] = {
> .from = { FEAT_1_ECX, CPUID_EXT_PDCM },
> .to = { FEAT_PERF_CAPABILITIES, ~0ull },
> },
> + {
> + .from = { FEAT_1_EDX, CPUID_DTS},
> + .to = { FEAT_1_ECX, CPUID_EXT_DTES64},
> + },
> {
> .from = { FEAT_1_ECX, CPUID_EXT_VMX },
> .to = { FEAT_VMX_PROCBASED_CTLS, ~0ull },
> @@ -9471,6 +9475,7 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> env->features[FEAT_1_ECX] &= ~CPUID_EXT_PDCM;
> }
>
> + env->features[FEAT_1_EDX] &= ~CPUID_DTS;
> env->features[FEAT_7_0_EDX] &= ~CPUID_7_0_EDX_ARCH_LBR;
This change, along with the original CPUID_7_0_EDX_ARCH_LBR clear, will also
affect the configuration for TD VMs.
For a TD VM, enable_pmu controls TDX_TD_ATTRIBUTES_PERFMON, CPUID_DTS is fixed
to 1, and arch_lbr is controlled by XFAM[15].
These features' configuration do not have dependencies on each other. So how
about skipping the TD VM case like:
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 98e95d0842..458bfb07b9 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -9736,8 +9736,10 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
env->features[FEAT_1_ECX] &= ~CPUID_EXT_PDCM;
}
- env->features[FEAT_1_EDX] &= ~CPUID_DTS;
- env->features[FEAT_7_0_EDX] &= ~CPUID_7_0_EDX_ARCH_LBR;
+ if (!is_tdx_vm()) {
+ env->features[FEAT_1_EDX] &= ~CPUID_DTS;
+ env->features[FEAT_7_0_EDX] &= ~CPUID_7_0_EDX_ARCH_LBR;
+ }
}
for (i = 0; i < ARRAY_SIZE(feature_dependencies); i++) {
> }
>
