From: CL Wang <[email protected]> Move the BSS clearing sequence as early as possible, directly after the hart lottery selection. This ensures all BSS variables are properly zeroed before any C code executes.
Signed-off-by: CL Wang <[email protected]> --- arch/riscv/cpu/start.S | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 7bafdfd390a..c54a194f5b1 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -166,7 +166,18 @@ call_harts_early_init: bnez tp, secondary_hart_loop #endif #endif - + +#ifdef CONFIG_XPL_BUILD + la t0, __bss_start + la t1, __bss_end + beq t0, t1, spl_clear_bss_done +1: + SREG zero, 0(t0) + addi t0, t0, REGBYTES + blt t0, t1, 1b +spl_clear_bss_done: +#endif + mv a0, s0 jal board_init_f_init_reserve @@ -219,16 +230,6 @@ wait_for_gd_init: jalr t5 /* jump to board_init_f() */ #ifdef CONFIG_XPL_BUILD -spl_clear_bss: - la t0, __bss_start - la t1, __bss_end - beq t0, t1, spl_stack_gd_setup - -spl_clear_bss_loop: - SREG zero, 0(t0) - addi t0, t0, REGBYTES - blt t0, t1, spl_clear_bss_loop - spl_stack_gd_setup: jal spl_relocate_stack_gd -- 2.34.1
