From: Blue Swirl <blauwir...@gmail.com> Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwir...@gmail.com> Signed-off-by: Alexander Graf <ag...@suse.de> Signed-off-by: Andreas Färber <afaer...@suse.de> Signed-off-by: Alexander Graf <ag...@suse.de> --- target-ppc/Makefile.objs | 1 - target-ppc/excp_helper.c | 60 ++++++++++++++++++++++++--------------------- target-ppc/helper.h | 28 ++++++++++---------- target-ppc/op_helper.c | 32 +++++++++++++---------- target-ppc/translate.c | 40 ++++++++++++++++-------------- 5 files changed, 85 insertions(+), 76 deletions(-) diff --git a/target-ppc/Makefile.objs b/target-ppc/Makefile.objs index c0f7e76..a02b7bc 100644 --- a/target-ppc/Makefile.objs +++ b/target-ppc/Makefile.objs @@ -4,5 +4,4 @@ obj-$(CONFIG_KVM) += kvm.o kvm_ppc.o obj-y += op_helper.o helper.o obj-y += excp_helper.o -$(obj)/excp_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) $(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index f03f738..c153f4a 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -17,7 +17,6 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" #include "helper_regs.h" @@ -28,7 +27,8 @@ /*****************************************************************************/ /* Exceptions processing helpers */ -void helper_raise_exception_err(uint32_t exception, uint32_t error_code) +void helper_raise_exception_err(CPUPPCState *env, uint32_t exception, + uint32_t error_code) { #if 0 printf("Raise exception %3x code : %d\n", exception, error_code); @@ -38,22 +38,22 @@ void helper_raise_exception_err(uint32_t exception, uint32_t error_code) cpu_loop_exit(env); } -void helper_raise_exception(uint32_t exception) +void helper_raise_exception(CPUPPCState *env, uint32_t exception) { - helper_raise_exception_err(exception, 0); + helper_raise_exception_err(env, exception, 0); } #if !defined(CONFIG_USER_ONLY) -void helper_store_msr(target_ulong val) +void helper_store_msr(CPUPPCState *env, target_ulong val) { val = hreg_store_msr(env, val, 0); if (val != 0) { env->interrupt_request |= CPU_INTERRUPT_EXITTB; - helper_raise_exception(val); + helper_raise_exception(env, val); } } -static inline void do_rfi(target_ulong nip, target_ulong msr, +static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr, target_ulong msrm, int keep_msrh) { #if defined(TARGET_PPC64) @@ -83,73 +83,77 @@ static inline void do_rfi(target_ulong nip, target_ulong msr, env->interrupt_request |= CPU_INTERRUPT_EXITTB; } -void helper_rfi(void) +void helper_rfi(CPUPPCState *env) { - do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], + do_rfi(env, env->spr[SPR_SRR0], env->spr[SPR_SRR1], ~((target_ulong)0x783F0000), 1); } #if defined(TARGET_PPC64) -void helper_rfid(void) +void helper_rfid(CPUPPCState *env) { - do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], + do_rfi(env, env->spr[SPR_SRR0], env->spr[SPR_SRR1], ~((target_ulong)0x783F0000), 0); } -void helper_hrfid(void) +void helper_hrfid(CPUPPCState *env) { - do_rfi(env->spr[SPR_HSRR0], env->spr[SPR_HSRR1], + do_rfi(env, env->spr[SPR_HSRR0], env->spr[SPR_HSRR1], ~((target_ulong)0x783F0000), 0); } #endif /*****************************************************************************/ /* Embedded PowerPC specific helpers */ -void helper_40x_rfci(void) +void helper_40x_rfci(CPUPPCState *env) { - do_rfi(env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3], + do_rfi(env, env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3], ~((target_ulong)0xFFFF0000), 0); } -void helper_rfci(void) +void helper_rfci(CPUPPCState *env) { - do_rfi(env->spr[SPR_BOOKE_CSRR0], SPR_BOOKE_CSRR1, + do_rfi(env, env->spr[SPR_BOOKE_CSRR0], SPR_BOOKE_CSRR1, ~((target_ulong)0x3FFF0000), 0); } -void helper_rfdi(void) +void helper_rfdi(CPUPPCState *env) { - do_rfi(env->spr[SPR_BOOKE_DSRR0], SPR_BOOKE_DSRR1, + do_rfi(env, env->spr[SPR_BOOKE_DSRR0], SPR_BOOKE_DSRR1, ~((target_ulong)0x3FFF0000), 0); } -void helper_rfmci(void) +void helper_rfmci(CPUPPCState *env) { - do_rfi(env->spr[SPR_BOOKE_MCSRR0], SPR_BOOKE_MCSRR1, + do_rfi(env, env->spr[SPR_BOOKE_MCSRR0], SPR_BOOKE_MCSRR1, ~((target_ulong)0x3FFF0000), 0); } #endif -void helper_tw(target_ulong arg1, target_ulong arg2, uint32_t flags) +void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2, + uint32_t flags) { if (!likely(!(((int32_t)arg1 < (int32_t)arg2 && (flags & 0x10)) || ((int32_t)arg1 > (int32_t)arg2 && (flags & 0x08)) || ((int32_t)arg1 == (int32_t)arg2 && (flags & 0x04)) || ((uint32_t)arg1 < (uint32_t)arg2 && (flags & 0x02)) || ((uint32_t)arg1 > (uint32_t)arg2 && (flags & 0x01))))) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_TRAP); } } #if defined(TARGET_PPC64) -void helper_td(target_ulong arg1, target_ulong arg2, uint32_t flags) +void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2, + uint32_t flags) { if (!likely(!(((int64_t)arg1 < (int64_t)arg2 && (flags & 0x10)) || ((int64_t)arg1 > (int64_t)arg2 && (flags & 0x08)) || ((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) || ((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) || ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_TRAP); } } #endif @@ -158,9 +162,9 @@ void helper_td(target_ulong arg1, target_ulong arg2, uint32_t flags) /*****************************************************************************/ /* PowerPC 601 specific instructions (POWER bridge) */ -void helper_rfsvc(void) +void helper_rfsvc(CPUPPCState *env) { - do_rfi(env->lr, env->ctr, 0x0000FFFF, 0); + do_rfi(env, env->lr, env->ctr, 0x0000FFFF, 0); } /* Embedded.Processor Control */ @@ -187,7 +191,7 @@ static int dbell2irq(target_ulong rb) return irq; } -void helper_msgclr(target_ulong rb) +void helper_msgclr(CPUPPCState *env, target_ulong rb) { int irq = dbell2irq(rb); diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 148543a..a4562ae 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -1,22 +1,22 @@ #include "def-helper.h" -DEF_HELPER_2(raise_exception_err, void, i32, i32) -DEF_HELPER_1(raise_exception, void, i32) -DEF_HELPER_3(tw, void, tl, tl, i32) +DEF_HELPER_3(raise_exception_err, void, env, i32, i32) +DEF_HELPER_2(raise_exception, void, env, i32) +DEF_HELPER_4(tw, void, env, tl, tl, i32) #if defined(TARGET_PPC64) -DEF_HELPER_3(td, void, tl, tl, i32) +DEF_HELPER_4(td, void, env, tl, tl, i32) #endif #if !defined(CONFIG_USER_ONLY) -DEF_HELPER_1(store_msr, void, tl) -DEF_HELPER_0(rfi, void) -DEF_HELPER_0(rfsvc, void) -DEF_HELPER_0(40x_rfci, void) -DEF_HELPER_0(rfci, void) -DEF_HELPER_0(rfdi, void) -DEF_HELPER_0(rfmci, void) +DEF_HELPER_2(store_msr, void, env, tl) +DEF_HELPER_1(rfi, void, env) +DEF_HELPER_1(rfsvc, void, env) +DEF_HELPER_1(40x_rfci, void, env) +DEF_HELPER_1(rfci, void, env) +DEF_HELPER_1(rfdi, void, env) +DEF_HELPER_1(rfmci, void, env) #if defined(TARGET_PPC64) -DEF_HELPER_0(rfid, void) -DEF_HELPER_0(hrfid, void) +DEF_HELPER_1(rfid, void, env) +DEF_HELPER_1(hrfid, void, env) #endif #endif @@ -359,7 +359,7 @@ DEF_HELPER_FLAGS_2(store_sr, TCG_CALL_CONST, void, tl, tl) DEF_HELPER_FLAGS_1(602_mfrom, TCG_CALL_CONST | TCG_CALL_PURE, tl, tl) DEF_HELPER_1(msgsnd, void, tl) -DEF_HELPER_1(msgclr, void, tl) +DEF_HELPER_2(msgclr, void, env, tl) #endif DEF_HELPER_3(dlmzb, tl, tl, tl, i32) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 2e87860..eedbb42 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -294,7 +294,7 @@ void helper_lswx(target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) if (likely(xer_bc != 0)) { if (unlikely((ra != 0 && reg < ra && (reg + xer_bc) > ra) || (reg < rb && (reg + xer_bc) > rb))) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_LSWX); } else { @@ -709,7 +709,7 @@ static inline uint64_t fload_invalid_op_excp(int op) /* Update the floating-point enabled exception summary */ env->fpscr |= 1 << FPSCR_FEX; if (msr_fe0 != 0 || msr_fe1 != 0) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op); } } @@ -726,7 +726,7 @@ static inline void float_zero_divide_excp(void) /* Update the floating-point enabled exception summary */ env->fpscr |= 1 << FPSCR_FEX; if (msr_fe0 != 0 || msr_fe1 != 0) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX); } } @@ -995,7 +995,8 @@ void helper_float_check_status(void) (env->error_code & POWERPC_EXCP_FP)) { /* Differred floating-point exception after target FPR update */ if (msr_fe0 != 0 || msr_fe1 != 0) { - helper_raise_exception_err(env->exception_index, env->error_code); + helper_raise_exception_err(env, env->exception_index, + env->error_code); } } else { int status = get_float_exception_flags(&env->fp_status); @@ -1781,13 +1782,13 @@ target_ulong helper_load_dcr(target_ulong dcrn) if (unlikely(env->dcr_env == NULL)) { qemu_log("No DCR environment\n"); - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); } else if (unlikely(ppc_dcr_read(env->dcr_env, (uint32_t)dcrn, &val) != 0)) { qemu_log("DCR read error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn); - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); } return val; @@ -1797,13 +1798,13 @@ void helper_store_dcr(target_ulong dcrn, target_ulong val) { if (unlikely(env->dcr_env == NULL)) { qemu_log("No DCR environment\n"); - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn, (uint32_t)val) != 0)) { qemu_log("DCR write error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn); - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); } } @@ -3783,7 +3784,7 @@ void tlb_fill(CPUPPCState *env1, target_ulong addr, int is_write, int mmu_idx, cpu_restore_state(tb, env, retaddr); } } - helper_raise_exception_err(env->exception_index, env->error_code); + helper_raise_exception_err(env, env->exception_index, env->error_code); } env = saved_env; } @@ -3809,7 +3810,8 @@ void helper_store_sr(target_ulong sr_num, target_ulong val) void helper_store_slb(target_ulong rb, target_ulong rs) { if (ppc_store_slb(env, rb, rs) < 0) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL); + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_INVAL); } } @@ -3818,7 +3820,8 @@ target_ulong helper_load_slb_esid(target_ulong rb) target_ulong rt; if (ppc_load_slb_esid(env, rb, &rt) < 0) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL); + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_INVAL); } return rt; } @@ -3828,7 +3831,8 @@ target_ulong helper_load_slb_vsid(target_ulong rb) target_ulong rt; if (ppc_load_slb_vsid(env, rb, &rt) < 0) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL); + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_INVAL); } return rt; } @@ -4328,7 +4332,7 @@ void helper_booke206_tlbwe(void) tlb = booke206_cur_tlb(env); if (!tlb) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); } @@ -4338,7 +4342,7 @@ void helper_booke206_tlbwe(void) size_ps = booke206_tlbnps(env, tlbn); if ((env->spr[SPR_BOOKE_MAS1] & MAS1_VALID) && (tlbncfg & TLBnCFG_AVAIL) && !(size_ps & (1 << size_tlb))) { - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); } diff --git a/target-ppc/translate.c b/target-ppc/translate.c index cf59765..02626ae 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -270,7 +270,7 @@ static inline void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t } t0 = tcg_const_i32(excp); t1 = tcg_const_i32(error); - gen_helper_raise_exception_err(t0, t1); + gen_helper_raise_exception_err(cpu_env, t0, t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); ctx->exception = (excp); @@ -283,7 +283,7 @@ static inline void gen_exception(DisasContext *ctx, uint32_t excp) gen_update_nip(ctx, ctx->nip); } t0 = tcg_const_i32(excp); - gen_helper_raise_exception(t0); + gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); ctx->exception = (excp); } @@ -297,7 +297,7 @@ static inline void gen_debug_exception(DisasContext *ctx) gen_update_nip(ctx, ctx->nip); } t0 = tcg_const_i32(EXCP_DEBUG); - gen_helper_raise_exception(t0); + gen_helper_raise_exception(cpu_env, t0); tcg_temp_free_i32(t0); } @@ -2495,7 +2495,7 @@ static inline void gen_check_align(DisasContext *ctx, TCGv EA, int mask) tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1); t1 = tcg_const_i32(POWERPC_EXCP_ALIGN); t2 = tcg_const_i32(0); - gen_helper_raise_exception_err(t1, t2); + gen_helper_raise_exception_err(cpu_env, t1, t2); tcg_temp_free_i32(t1); tcg_temp_free_i32(t2); gen_set_label(l1); @@ -3662,7 +3662,7 @@ static void gen_rfi(DisasContext *ctx) return; } gen_update_cfar(ctx, ctx->nip); - gen_helper_rfi(); + gen_helper_rfi(cpu_env); gen_sync_exception(ctx); #endif } @@ -3679,7 +3679,7 @@ static void gen_rfid(DisasContext *ctx) return; } gen_update_cfar(ctx, ctx->nip); - gen_helper_rfid(); + gen_helper_rfid(cpu_env); gen_sync_exception(ctx); #endif } @@ -3694,7 +3694,7 @@ static void gen_hrfid(DisasContext *ctx) gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); return; } - gen_helper_hrfid(); + gen_helper_hrfid(cpu_env); gen_sync_exception(ctx); #endif } @@ -3722,7 +3722,8 @@ static void gen_tw(DisasContext *ctx) TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); /* Update the nip since this might generate a trap exception */ gen_update_nip(ctx, ctx->nip); - gen_helper_tw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); + gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], + t0); tcg_temp_free_i32(t0); } @@ -3733,7 +3734,7 @@ static void gen_twi(DisasContext *ctx) TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); /* Update the nip since this might generate a trap exception */ gen_update_nip(ctx, ctx->nip); - gen_helper_tw(cpu_gpr[rA(ctx->opcode)], t0, t1); + gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free_i32(t1); } @@ -3745,7 +3746,8 @@ static void gen_td(DisasContext *ctx) TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); /* Update the nip since this might generate a trap exception */ gen_update_nip(ctx, ctx->nip); - gen_helper_td(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); + gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], + t0); tcg_temp_free_i32(t0); } @@ -3756,7 +3758,7 @@ static void gen_tdi(DisasContext *ctx) TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); /* Update the nip since this might generate a trap exception */ gen_update_nip(ctx, ctx->nip); - gen_helper_td(cpu_gpr[rA(ctx->opcode)], t0, t1); + gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free_i32(t1); } @@ -3934,7 +3936,7 @@ static void gen_mtmsrd(DisasContext *ctx) * directly from ppc_store_msr */ gen_update_nip(ctx, ctx->nip); - gen_helper_store_msr(cpu_gpr[rS(ctx->opcode)]); + gen_helper_store_msr(cpu_env, cpu_gpr[rS(ctx->opcode)]); /* Must stop the translation as machine state (may have) changed */ /* Note that mtmsr is not always defined as context-synchronizing */ gen_stop_exception(ctx); @@ -3972,7 +3974,7 @@ static void gen_mtmsr(DisasContext *ctx) #else tcg_gen_mov_tl(msr, cpu_gpr[rS(ctx->opcode)]); #endif - gen_helper_store_msr(msr); + gen_helper_store_msr(cpu_env, msr); /* Must stop the translation as machine state (may have) changed */ /* Note that mtmsr is not always defined as context-synchronizing */ gen_stop_exception(ctx); @@ -5290,7 +5292,7 @@ static void gen_rfsvc(DisasContext *ctx) gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); return; } - gen_helper_rfsvc(); + gen_helper_rfsvc(cpu_env); gen_sync_exception(ctx); #endif } @@ -5849,7 +5851,7 @@ static void gen_rfci_40x(DisasContext *ctx) return; } /* Restore CPU state */ - gen_helper_40x_rfci(); + gen_helper_40x_rfci(cpu_env); gen_sync_exception(ctx); #endif } @@ -5864,7 +5866,7 @@ static void gen_rfci(DisasContext *ctx) return; } /* Restore CPU state */ - gen_helper_rfci(); + gen_helper_rfci(cpu_env); gen_sync_exception(ctx); #endif } @@ -5882,7 +5884,7 @@ static void gen_rfdi(DisasContext *ctx) return; } /* Restore CPU state */ - gen_helper_rfdi(); + gen_helper_rfdi(cpu_env); gen_sync_exception(ctx); #endif } @@ -5898,7 +5900,7 @@ static void gen_rfmci(DisasContext *ctx) return; } /* Restore CPU state */ - gen_helper_rfmci(); + gen_helper_rfmci(cpu_env); gen_sync_exception(ctx); #endif } @@ -6258,7 +6260,7 @@ static void gen_msgclr(DisasContext *ctx) return; } - gen_helper_msgclr(cpu_gpr[rB(ctx->opcode)]); + gen_helper_msgclr(cpu_env, cpu_gpr[rB(ctx->opcode)]); #endif } -- 1.6.0.2
