Rename the EHCI CTRLDSSEGMENT default property and internal field to improve readability.
No functional change. Signed-off-by: Jamin Lin <[email protected]> --- hw/usb/hcd-ehci.h | 6 +++--- hw/arm/aspeed_ast27x0.c | 2 +- hw/usb/hcd-ehci.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index b5ac9c8670..b739c81870 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -268,7 +268,7 @@ struct EHCIState { */ bool migrate_fetch_addr_64bit; bool caps_64bit_addr; - uint32_t ctrldssegment_default; + uint32_t ctrl_ds_segment_default; /* * EHCI spec version 1.0 Section 2.3 @@ -335,8 +335,8 @@ struct EHCIState { ehci.migrate_fetch_addr_64bit, true), \ DEFINE_PROP_BOOL("caps-64bit-addr", _state, \ ehci.caps_64bit_addr, false), \ - DEFINE_PROP_UINT32("ctrldssegment-default", _state, \ - ehci.ctrldssegment_default, 0) + DEFINE_PROP_UINT32("ctrl-ds-segment-default", _state, \ + ehci.ctrl_ds_segment_default, 0) extern const VMStateDescription vmstate_ehci; diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index a8f0bc389c..5865894658 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -856,7 +856,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) /* EHCI */ for (i = 0; i < sc->ehcis_num; i++) { - object_property_set_int(OBJECT(&s->ehci[i]), "ctrldssegment-default", + object_property_set_int(OBJECT(&s->ehci[i]), "ctrl-ds-segment-default", sc->memmap[ASPEED_DEV_SDRAM] >> 32, &error_abort); object_property_set_bool(OBJECT(&s->ehci[i]), "caps-64bit-addr", true, diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index 56ac8f6ae5..133501b0f4 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -1134,7 +1134,7 @@ static void ehci_opreg_write(void *ptr, hwaddr addr, "64-bit addressing capability is disabled\n"); return; } - val |= s->ctrldssegment_default; + val |= s->ctrl_ds_segment_default; break; case ASYNCLISTADDR: -- 2.43.0
