On Fri, 27 Mar 2026 at 11:17, Peter Maydell <[email protected]> wrote:
>
> This patchset implements initial support of emulation of Arm's new
> interrupt controller architecture, GICv5.
>
> I've incorporated the review feedback from v1, so I figured I
> might as well send this out, though obviously there's no huge
> rush to review given we're in freeze.

I'm taking this into target-arm.next. In the process of
testing the pullreq I discovered that it doesn't build
in a --disable-tcg config. I made the following changes to
fix that, which I'll squash into the appropriate patches.
(My choices here are aimed at keeping the amount of fixing
up smaller; some of them will end up cleaned up when we add
the GICv5 KVM support, eg the "if TCG" clause in the virt
"select ARM_GICV5" will go away again.)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 36de9aee3e..5b198402d5 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -10,7 +10,7 @@ config ARM_VIRT
     imply NVDIMM
     imply IOMMUFD
     select ARM_GIC
-    select ARM_GICV5
+    select ARM_GICV5 if TCG
     select ACPI
     select ARM_SMMUV3
     select GPIO_KEY
diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig
index a3241fc1eb..636d00b7e8 100644
--- a/hw/intc/Kconfig
+++ b/hw/intc/Kconfig
@@ -37,6 +37,7 @@ config ARM_GIC_KVM

 config ARM_GICV5
     bool
+    depends on TCG
     select MSI_NONBROKEN

 config XICS
diff --git a/hw/intc/arm_gicv5_common.c b/hw/intc/arm_gicv5_common.c
index 0b5303f370..b3bd3eee7b 100644
--- a/hw/intc/arm_gicv5_common.c
+++ b/hw/intc/arm_gicv5_common.c
@@ -215,13 +215,3 @@ static void gicv5_common_class_init(ObjectClass
*oc, const void *data)
     dc->realize = gicv5_common_realize;
     device_class_set_props(dc, arm_gicv5_common_properties);
 }
-
-const char *gicv5_class_name(void)
-{
-    /* When we implement KVM GICv5 we might return "kvm-arm-gicv5" here. */
-    if (kvm_enabled()) {
-        error_report("Userspace GICv5 is not supported with KVM");
-        exit(1);
-    }
-    return "arm-gicv5";
-}
diff --git a/include/hw/intc/arm_gicv5_common.h
b/include/hw/intc/arm_gicv5_common.h
index 74fa68d8c0..32f6cc9b8b 100644
--- a/include/hw/intc/arm_gicv5_common.h
+++ b/include/hw/intc/arm_gicv5_common.h
@@ -13,6 +13,8 @@
 #include "hw/core/sysbus.h"
 #include "hw/intc/arm_gicv5_types.h"
 #include "target/arm/cpu-qom.h"
+#include "include/system/kvm.h"
+#include "include/qemu/error-report.h"

 /*
  * QEMU interface:
@@ -192,7 +194,15 @@ static inline bool
gicv5_domain_implemented(GICv5Common *cs, GICv5Domain domain)
  *
  * Returns: class name to use
  */
-const char *gicv5_class_name(void);
+static inline const char *gicv5_class_name(void)
+{
+    /* When we implement KVM GICv5 we might return "kvm-arm-gicv5" here. */
+    if (kvm_enabled()) {
+        error_report("Userspace GICv5 is not supported with KVM");
+        exit(1);
+    }
+    return "arm-gicv5";
+}

 /**
  * gicv5_raw_spi_state
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f2646ae4ed..330e9be473 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -39,9 +39,9 @@
 #if !defined(CONFIG_USER_ONLY)
 #include "hw/core/loader.h"
 #include "hw/core/boards.h"
+#include "hw/intc/arm_gicv5_stream.h"
 #ifdef CONFIG_TCG
 #include "hw/intc/armv7m_nvic.h"
-#include "hw/intc/arm_gicv5_stream.h"
 #endif /* CONFIG_TCG */
 #endif /* !CONFIG_USER_ONLY */
 #include "system/tcg.h"
diff --git a/target/arm/tcg-stubs.c b/target/arm/tcg-stubs.c
index aeeede8066..8d97449cfc 100644
--- a/target/arm/tcg-stubs.c
+++ b/target/arm/tcg-stubs.c
@@ -43,3 +43,7 @@ void vfp_clear_float_status_exc_flags(CPUARMState *env)
 void vfp_set_fpcr_to_host(CPUARMState *env, uint32_t val, uint32_t mask)
 {
 }
+
+void gicv5_update_ppi_state(CPUARMState *env, int ppi, bool level)
+{
+}

thanks
-- PMM

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