> -----Original Message-----
> From: Eric Auger <[email protected]>
> Sent: 03 May 2026 08:34
> To: [email protected]; [email protected]; qemu-
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; Shameer Kolothum Thodi
> <[email protected]>; [email protected]
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]
> Subject: [PATCH v4 12/17] target/arm/kvm: Introduce
> kvm_arm_expose_idreg_properties
>
> External email: Use caution opening links or attachments
>
>
> This helper decode the ID reg writable mask, matches it against
> ID reg fields defined in target/arm/cpu-sysreg-properties.c and
> for each writable named field, generates a uint64 property.
>
> Signed-off-by: Eric Auger <[email protected]>
> ---
> target/arm/kvm.c | 134
> ++++++++++++++++++++++++++++++++++++++++
> target/arm/kvm_arm.h | 10 +++
> target/arm/trace-events | 4 ++
> 3 files changed, 148 insertions(+)
>
> diff --git a/target/arm/kvm.c b/target/arm/kvm.c
> index ca9a7d9439..d9bf1ec039 100644
> --- a/target/arm/kvm.c
> +++ b/target/arm/kvm.c
> @@ -344,6 +344,140 @@ static int get_host_cpu_idregs(ARMCPU *cpu, int
> fd, ARMHostCPUFeatures *ahcf)
> return err;
> }
>
> +static ARM64SysRegField *get_field(int i, ARM64SysReg *reg)
> +{
> + GList *l;
> +
> + for (l = reg->fields; l; l = l->next) {
> + ARM64SysRegField *field = (ARM64SysRegField *)l->data;
> +
> + if (i >= field->lower && i <= field->upper) {
> + return field;
> + }
> + }
> + return NULL;
> +}
> +
> +static void set_sysreg_prop(Object *obj, Visitor *v,
> + const char *name, void *opaque,
> + Error **errp)
> +{
> + ARM64SysRegField *field = (ARM64SysRegField *)opaque;
> + ARMCPU *cpu = ARM_CPU(obj);
> + uint64_t *idregs = cpu->isar.idregs;
> + uint64_t old, value, mask;
> + int lower = field->lower;
> + int upper = field->upper;
> + int length = upper - lower + 1;
> + int index = field->index;
> +
> + if (!visit_type_uint64(v, name, &value, errp)) {
> + return;
> + }
> +
> + if (length < 64 && value > ((1 << length) - 1)) {
> + error_setg(errp,
> + "idreg %s set value (0x%lx) exceeds length of field
> (%d)!",
> + name, value, length);
> + return;
> + }
> +
> + mask = MAKE_64BIT_MASK(lower, length);
> + value = value << lower;
> + old = idregs[index];
> + idregs[index] = old & ~mask;
> + idregs[index] |= value;
> + trace_set_sysreg_prop(name, old, mask, value, idregs[index]);
> +}
> +
> +static void get_sysreg_prop(Object *obj, Visitor *v,
> + const char *name, void *opaque,
> + Error **errp)
> +{
> + ARM64SysRegField *field = (ARM64SysRegField *)opaque;
> + ARMCPU *cpu = ARM_CPU(obj);
> + uint64_t *idregs = cpu->isar.idregs;
> + uint64_t value, mask;
> + int lower = field->lower;
> + int upper = field->upper;
> + int length = upper - lower + 1;
> + int index = field->index;
> +
> + mask = MAKE_64BIT_MASK(lower, length);
> + value = (idregs[index] & mask) >> lower;
> + visit_type_uint64(v, name, &value, errp);
> + trace_get_sysreg_prop(name, value);
> +}
> +
> +/*
> + * decode_idreg_writemap: Generate props for writable fields
> + *
> + * @obj: CPU object
> + * @index: index of the sysreg
> + * @map: writable map for the sysreg
> + * @reg: description of the sysreg
> + */
> +static int
> +decode_idreg_writemap(Object *obj, int index, uint64_t map, ARM64SysReg
> *reg)
> +{
> + int i = ctz64(map);
> + int nb_sysreg_props = 0;
> +
> + while (map) {
> + ARM64SysRegField *field = get_field(i, reg);
> + int lower, upper;
> + uint64_t mask;
> + char *prop_name;
> +
> + if (!field) {
> + warn_report("%s bit %d of %s is writable but no named field "
> + "in target/arm/cpu-sysreg-properties.c",
> + __func__, i, reg->name);
> + warn_report("%s is target/arm/cpu-sysreg-properties.c up to
> date?",
> __func__);
> + map = map & ~BIT_ULL(i);
> + i = ctz64(map);
> + continue;
> + }
> + lower = field->lower;
> + upper = field->upper;
> + prop_name = g_strdup_printf("SYSREG_%s_%s", reg->name, field-
> >name);
> + trace_decode_idreg_writemap(field->name, lower, upper, prop_name);
> + object_property_add(obj, prop_name, "uint64",
> + get_sysreg_prop, set_sysreg_prop, NULL, field);
> + nb_sysreg_props++;
g_free(prop_name) ? Or may be use g_autofree.
> +
> + mask = MAKE_64BIT_MASK(lower, upper - lower + 1);
> + map = map & ~mask;
> + i = ctz64(map);
> + }
> + trace_nb_sysreg_props(reg->name, nb_sysreg_props);
> + return 0;
> +}
> +
> +/* analyze the writable mask and generate properties for writable fields */
> +void kvm_arm_expose_idreg_properties(ARMCPU *cpu, ARM64SysReg
> *regs)
> +{
> + int i, idx;
> + IdRegMap *map = cpu->writable_map;
I think better we check writable_map before proceeding.
Thanks,
Shameer
> + Object *obj = OBJECT(cpu);
> +
> + for (i = 0; i < NR_ID_REG_MASKS; i++) {
> + uint64_t mask = map->regs[i];
> +
> + if (mask) {
> + /* reg @i has some writable fields, decode them */
> + idx = kvm_feature_idx_to_idregs_idx(i);
> + if (idx < 0) {
> + /* no matching reg? */
> + warn_report("%s: reg %d writable, but not in list of
> idregs?",
> + __func__, i);
> + } else {
> + decode_idreg_writemap(obj, i, mask, ®s[idx]);
> + }
> + }
> + }
> +}
> +
> static bool
> kvm_arm_get_host_cpu_features(ARMCPU *cpu, ARMHostCPUFeatures
> *ahcf,
> bool get_all_writable_id_regs)
> diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
> index 91a7d5cc4b..a3034f264b 100644
> --- a/target/arm/kvm_arm.h
> +++ b/target/arm/kvm_arm.h
> @@ -146,6 +146,16 @@ void
> kvm_arm_set_cpu_features_from_host(ARMCPU *cpu,
> */
> void kvm_arm_add_vcpu_properties(ARMCPU *cpu);
>
> +typedef struct ARM64SysReg ARM64SysReg;
> +/**
> + * kvm_arm_expose_idreg_properties:
> + * @cpu: The CPU object to generate the properties for
> + * @reg: registers from the host
> + *
> + * analyze the writable mask and generate properties for writable fields
> + */
> +void kvm_arm_expose_idreg_properties(ARMCPU *cpu, ARM64SysReg
> *regs);
> +
> /**
> * kvm_arm_steal_time_finalize:
> * @cpu: ARMCPU for which to finalize kvm-steal-time
> diff --git a/target/arm/trace-events b/target/arm/trace-events
> index c25d2a1191..d72ad6b671 100644
> --- a/target/arm/trace-events
> +++ b/target/arm/trace-events
> @@ -15,6 +15,10 @@ arm_gt_update_irq(int timer, int irqstate)
> "gt_update_irq: timer %d irqstate %d"
> kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova =
> 0x%"PRIx64" is translated into 0x%"PRIx64
> get_host_cpu_idregs(const char *name, uint64_t value) "scratch vcpu host
> value for %s is 0x%"PRIx64
> kvm_arm_writable_idregs_to_cpreg_list(const char *name, uint64_t
> previous, uint64_t new) "%s overwrite default 0x%"PRIx64" with 0x%"PRIx64
> +decode_idreg_writemap(const char* name, int lower, int upper, char
> *prop_name) "%s [%d:%d] is writable (prop %s)"
> +get_sysreg_prop(const char *name, uint64_t value) "%s 0x%"PRIx64
> +set_sysreg_prop(const char *name, uint64_t old, uint64_t mask, uint64_t
> field_value, uint64_t new) "%s old reg value=0x%"PRIx64" mask=0x%"PRIx64"
> new field value=0x%"PRIx64" new reg value=0x%"PRIx64
> +nb_sysreg_props(const char *name, int count) "%s: %d SYSREG properties"
>
> # cpu.c
> arm_cpu_reset(uint64_t mp_aff) "cpu %" PRIu64
> --
> 2.53.0
