Since there is no bfloat16 variant of FAMINMAX, check for missing function pointer in do_z2z_nn_fpst.
Signed-off-by: Richard Henderson <[email protected]> --- target/arm/cpu-features.h | 5 +++++ target/arm/tcg/translate-sme.c | 23 +++++++++++++++++++++-- target/arm/tcg/sme.decode | 5 +++++ 3 files changed, 31 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h index 21d0be73cd..fe5d3a1635 100644 --- a/target/arm/cpu-features.h +++ b/target/arm/cpu-features.h @@ -1587,6 +1587,11 @@ static inline bool isar_feature_aa64_sme2_f64f64(const ARMISARegisters *id) return isar_feature_aa64_sme2(id) && isar_feature_aa64_sme_f64f64(id); } +static inline bool isar_feature_aa64_sme2_faminmax(const ARMISARegisters *id) +{ + return isar_feature_aa64_sme2(id) && isar_feature_aa64_faminmax(id); +} + static inline bool isar_feature_aa64_sve_i8mm(const ARMISARegisters *id) { return isar_feature_aa64_sve(id) && isar_feature_aa64_sme_sve_i8mm(id); diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index 08254b088e..a67501226f 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "helper-a64.h" #include "helper-sme.h" #include "helper-sve.h" #include "translate.h" @@ -742,9 +743,12 @@ static bool do_z2z_nn_fpst(DisasContext *s, arg_z2z_en *a, gen_helper_gvec_3_ptr * const fns[4]) { int esz = a->esz, n, dn, dm, vsz; - gen_helper_gvec_3_ptr *fn; + gen_helper_gvec_3_ptr *fn = fns[esz]; TCGv_ptr fpst; + if (fn == NULL) { + return false; + } if (esz == MO_8 && !dc_isar_feature(aa64_sme_b16b16, s)) { return false; } @@ -753,7 +757,6 @@ static bool do_z2z_nn_fpst(DisasContext *s, arg_z2z_en *a, } fpst = fpstatus_ptr(esz == MO_16 ? FPST_A64_F16 : FPST_A64); - fn = fns[esz]; n = a->n; dn = a->zdn; dm = a->zm; @@ -812,6 +815,22 @@ static gen_helper_gvec_3_ptr * const f_vector_fminnm[4] = { TRANS_FEAT(FMINNM_n1, aa64_sme2, do_z2z_n1_fpst, a, f_vector_fminnm) TRANS_FEAT(FMINNM_nn, aa64_sme2, do_z2z_nn_fpst, a, f_vector_fminnm) +static gen_helper_gvec_3_ptr * const f_vector_famax[4] = { + NULL, + gen_helper_gvec_famax_h, + gen_helper_gvec_famax_s, + gen_helper_gvec_famax_d, +}; +TRANS_FEAT(FAMAX_nn, aa64_sme2_faminmax, do_z2z_nn_fpst, a, f_vector_famax) + +static gen_helper_gvec_3_ptr * const f_vector_famin[4] = { + NULL, + gen_helper_gvec_famin_h, + gen_helper_gvec_famin_s, + gen_helper_gvec_famin_d, +}; +TRANS_FEAT(FAMIN_nn, aa64_sme2_faminmax, do_z2z_nn_fpst, a, f_vector_famin) + /* Add/Sub vector Z[m] to each Z[n*N] with result in ZA[d*N]. */ static bool do_azz_n1(DisasContext *s, arg_azz_n *a, int esz, GVecGen3FnVar *fn) diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode index 6bb9aa2a90..9dec7318a4 100644 --- a/target/arm/tcg/sme.decode +++ b/target/arm/tcg/sme.decode @@ -286,6 +286,11 @@ URSHL_nn 1100000 1 .. 1 ..... 1011.0 10001 .... 1 @z2z_4x4 SQDMULH_nn 1100000 1 .. 1 ..... 1011.1 00000 .... 0 @z2z_2x2 SQDMULH_nn 1100000 1 .. 1 ..... 1011.1 00000 .... 0 @z2z_4x4 +FAMAX_nn 1100000 1 .. 1 ..... 1011.0 01010 .... 0 @z2z_2x2 +FAMAX_nn 1100000 1 .. 1 ..... 1011.0 01010 .... 0 @z2z_4x4 +FAMIN_nn 1100000 1 .. 1 ..... 1011.0 01010 .... 1 @z2z_2x2 +FAMIN_nn 1100000 1 .. 1 ..... 1011.0 01010 .... 1 @z2z_4x4 + ### SME2 Multi-vector Multiple and Single Array Vectors &azz_n n off rv zn zm -- 2.43.0
