On 26/03/05 12:09AM, Saif Abrar wrote:
> <...snip...>
> --- a/hw/pci-host/pnv_phb4.c
> +++ b/hw/pci-host/pnv_phb4.c
> @@ -511,6 +511,20 @@ static uint32_t get_exp_offset(PCIDevice *pdev)
> return rpc->exp_offset;
> }
>
> +/*
> + * Config-read the link-status register in the PCI-E macro,
> + * convert to LE and check the link-active bit.
> + */
> +static uint32_t is_link_active(PnvPHB4 *phb)
> +{
> + PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base);
> + PCIDevice *pdev = pci_find_device(pci->bus, 0, 0);
> + uint32_t exp_offset = get_exp_offset(pdev);
> +
> + return (bswap32(pnv_phb4_rc_config_read(phb, exp_offset +
> PCI_EXP_LNKSTA, 4)
> + ) & PCI_EXP_LNKSTA_DLLLA);
should it be be32_to_cpu instead of bswap ?
> +}
> +
> /*
> * Apply sticky-mask 's' to the reset-value 'v' and write to the address 'a'.
> * RC-config space values and masks are LE.
> @@ -729,6 +743,11 @@ static void pnv_phb4_reg_write(void *opaque, hwaddr off,
> uint64_t val,
> val = 0;
> break;
>
> + case PHB_PCIE_HOTPLUG_STATUS:
> + /* For normal operations, Simspeed diagnostic bit is always zero */
> + val &= PHB_PCIE_HPSTAT_SIMDIAG;
> + break;
spec says this about HPSTAT_SIMDIAG bit in Hot Plug Status register:
NOTE: if simulation code changes this bit (Simspeed diagnostic bit)
it should also write bit '9' so that the input status signal
will re-sample correctly.".
i don't think bit 9 makes a difference for us currently, but i think
good to set bit 9 too. what do you say ?
> <...snip...>
>
> + /*
> + * Config-read the PCI-E macro register for slot-status.
> + * Method for config-read converts to BE value.
> + * To check actual bit in the PCI-E register,
> + * convert the value back to LE using bswap32().
> + * Clear the Presence-status active low bit.
> + */
> + if (bswap32(pnv_phb4_rc_config_read(phb, exp_base + PCI_EXP_SLTSTA,
> 4))
> + & PCI_EXP_SLTSTA_PDS) {
> + val &= ~PHB_PCIE_HPSTAT_PRESENCE;
be*_to_cpu makes more sense than bswap32 here, as PCI_EXP_SLTSTA_PDS is
in qemu endianness
- Aditya G