The get_phys_addr_attrs_debug method of SysemuCPUOps is used only by x86 and microblaze. Convert x86 to the newer translate_for_debug method, as a step towards being able to remove get_phys_addr_attrs_debug.
The new API allows us to tell the caller the actual size of the mapping via lg_page_size, so we do that, although no caller will care since it's always at least TARGET_PAGE_BITS. Signed-off-by: Peter Maydell <[email protected]> --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 4 ++-- target/i386/helper.c | 31 +++++++++++++++++-------------- target/i386/whpx/whpx-all.c | 2 +- 4 files changed, 21 insertions(+), 18 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7248720a0e..8929a75c7c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -10877,7 +10877,7 @@ static const struct SysemuCPUOps i386_sysemu_ops = { .has_work = x86_cpu_has_work, .get_memory_mapping = x86_cpu_get_memory_mapping, .get_paging_enabled = x86_cpu_get_paging_enabled, - .get_phys_addr_attrs_debug = x86_cpu_get_phys_addr_attrs_debug, + .translate_for_debug = x86_cpu_translate_for_debug, .asidx_from_attrs = x86_asidx_from_attrs, .get_crash_info = x86_cpu_get_crash_info, .write_elf32_note = x86_cpu_write_elf32_note, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index bdd4fff89d..67e2ecf325 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2581,8 +2581,8 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env); #ifndef CONFIG_USER_ONLY int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request); -hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cpu, vaddr addr, - MemTxAttrs *attrs); +bool x86_cpu_translate_for_debug(CPUState *cpu, vaddr addr, + TranslateForDebugResult *result); int cpu_get_pic_interrupt(CPUX86State *s); /* MS-DOS compatibility mode FPU exception support */ diff --git a/target/i386/helper.c b/target/i386/helper.c index 8cc73f619a..30f1fa41b3 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -252,8 +252,8 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4) } #if !defined(CONFIG_USER_ONLY) -hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, - MemTxAttrs *attrs) +bool x86_cpu_translate_for_debug(CPUState *cs, vaddr addr, + TranslateForDebugResult *result) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; @@ -263,8 +263,6 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, uint32_t page_offset; int page_size; - *attrs = cpu_get_mem_attrs(env); - a20_mask = x86_get_a20_mask(env); if (!(env->cr[0] & CR0_PG_MASK)) { pte = addr & a20_mask; @@ -283,7 +281,7 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, /* test virtual address sign extension */ sext = la57 ? (int64_t)addr >> 56 : (int64_t)addr >> 47; if (sext != 0 && sext != -1) { - return -1; + return false; } if (la57) { @@ -291,7 +289,7 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, (((addr >> 48) & 0x1ff) << 3)) & a20_mask; pml5e = x86_ldq_phys(cs, pml5e_addr); if (!(pml5e & PG_PRESENT_MASK)) { - return -1; + return false; } } else { pml5e = env->cr[3]; @@ -301,13 +299,13 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, (((addr >> 39) & 0x1ff) << 3)) & a20_mask; pml4e = x86_ldq_phys(cs, pml4e_addr); if (!(pml4e & PG_PRESENT_MASK)) { - return -1; + return false; } pdpe_addr = ((pml4e & PG_ADDRESS_MASK) + (((addr >> 30) & 0x1ff) << 3)) & a20_mask; pdpe = x86_ldq_phys(cs, pdpe_addr); if (!(pdpe & PG_PRESENT_MASK)) { - return -1; + return false; } if (pdpe & PG_PSE_MASK) { page_size = 1024 * 1024 * 1024; @@ -322,14 +320,14 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, a20_mask; pdpe = x86_ldq_phys(cs, pdpe_addr); if (!(pdpe & PG_PRESENT_MASK)) - return -1; + return false; } pde_addr = ((pdpe & PG_ADDRESS_MASK) + (((addr >> 21) & 0x1ff) << 3)) & a20_mask; pde = x86_ldq_phys(cs, pde_addr); if (!(pde & PG_PRESENT_MASK)) { - return -1; + return false; } if (pde & PG_PSE_MASK) { /* 2 MB page */ @@ -343,7 +341,7 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, pte = x86_ldq_phys(cs, pte_addr); } if (!(pte & PG_PRESENT_MASK)) { - return -1; + return false; } } else { uint32_t pde; @@ -352,7 +350,7 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & a20_mask; pde = x86_ldl_phys(cs, pde_addr); if (!(pde & PG_PRESENT_MASK)) - return -1; + return false; if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { pte = pde | ((pde & 0x1fe000LL) << (32 - 13)); page_size = 4096 * 1024; @@ -361,7 +359,7 @@ hwaddr x86_cpu_get_phys_addr_attrs_debug(CPUState *cs, vaddr addr, pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & a20_mask; pte = x86_ldl_phys(cs, pte_addr); if (!(pte & PG_PRESENT_MASK)) { - return -1; + return false; } page_size = 4096; } @@ -373,7 +371,12 @@ out: #endif pte &= PG_ADDRESS_MASK & ~(page_size - 1); page_offset = addr & (page_size - 1); - return pte | page_offset; + + result->attrs = cpu_get_mem_attrs(env); + result->attrs.debug = 1; + result->physaddr = pte | page_offset; + result->lg_page_size = ctz64(page_size); + return true; } typedef struct MCEInjectionParams { diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 7943adb93f..e626acef2f 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -247,7 +247,7 @@ struct whpx_register_set { * e. Let the affected CPU run in the exclusive mode. * f. Restore the original handler and the exception exit bitmap. * Note that handling all corner cases related to IDT/GDT is harder - * than it may seem. See x86_cpu_get_phys_addr_attrs_debug() for a + * than it may seem. See x86_cpu_translate_for_debug() for a * rough idea. * * 3. In order to properly support guest-level debugging in parallel with -- 2.43.0
