Hi Zhenzhong,
The series passed our non-regression test suite for emulated svm.
I will try to test upcoming versions as well.
cmd
On Sat, 2026-05-09 at 00:07 -0400, Zhenzhong Duan wrote:
> Hi,
>
> Now we already support first stage translation with passthrough device
> backed by nested translation in host, but only for IOMMU_NO_PASID.
>
> Structure VTDAddressSpace includes some elements suitable for emulated
> device and passthrough device without PASID, e.g., address space,
> different memory regions, etc, it is also protected by vtd iommu lock,
> all these are useless and become a burden for passthrough device with
> PASID.
>
> When there are lots of PASIDs used in one device, the AS and MRs are
> all registered to memory core and impact the whole system performance.
>
> So instead of using VTDAddressSpace to cache pasid entry for each pasid
> of a passthrough device, we define a light weight structure
> VTDAccelPASIDCacheEntry with only necessary elements for each pasid. We
> will use this struct as a parameter to conduct binding/unbinding to
> nested hwpt, to record the current binded nested hwpt and even future
> PRQ support. It's also designed to support IOMMU_NO_PASID.
>
> The potential full definition of VTDAccelPASIDCacheEntry may like:
>
> typedef struct VTDAccelPASIDCacheEntry {
> VTDHostIOMMUDevice *vtd_hiod;
> VTDPASIDEntry pasid_entry;
> uint32_t pasid;
> uint32_t fs_hwpt_id;
> uint32_t fault_id;
> int fault_fd;
> QLIST_HEAD(, VTDPRQEntry) vtd_prq_list;
> IOMMUPRINotifier pri_notifier_entry;
> IOMMUPRINotifier *pri_notifier;
> QLIST_ENTRY(VTDAccelPASIDCacheEntry) next;
> } VTDAccelPASIDCacheEntry;
>
> Based on newest master branch.
> GIT branch:
> [https://github.com/yiliu1765/qemu/tree/zhenzhong/iommufd_pasid.v5](https://github.com/yiliu1765/qemu/tree/zhenzhong/iommufd_pasid.v5)
>
> PATCH01-08: Some preparing work
> PATCH09-13: Handle PASID entry addition/removal and bind/unbind
> PATCH14-15: Add PASID related check and enable PASID for passthrough device
>
> Tests:
> Tested with DSA device which driver uses 2 PASIDs by default.
>
> Thanks
> Zhenzhong
>
> Changelog:
> v5:
> - use %u for pasid print (Shammer)
> - s/attachment/detachment in API doc (Shammer)
> - save iommu pasid in vtd_as to avoid the check of PCI pasid whenever
> possible (Clement)
> - commit log minor tweak on patch3 and patch7 (Liuyi)
> - use name 'pasid-bits' for pasid property (Liuyi)
>
> v4:
> - improve documents of VIOMMU_FLAGs (Cédric)
> - add a cleanup patch to simplify the check between PCI pasid and VTD pasid
> (Clement)
> - rebase to newest master branch
>
> v3:
> - fix @Pasid parameter's comment (Liuyi)
> - introduce a wrapper vtd_accel_delete_pc() (Liuyi)
> - drop patch12 in v2 to avoid a race condition (Clement)
> - s/PASID_0/IOMMU_NO_PASID s/gloal/global s/as_it/hiod_it (Liuyi)
> - make trace_vtd_device_at/detach_hwpt use IOMMU_NO_PASID (Liuyi)
> - change _accel subfix style naming to vtd_accel_ prefix style (Liuyi)
> - drop unnecessary parameter vtd_hiod* from vtd_destroy_old_fs_hwpt() (Liuyi)
>
> - introduce a new flag VIOMMU_FLAG_WANT_PASID_ATTACH for pasid attach
> (Nicolin)
>
> v2:
> - move the check "s->pasid > PCI_EXT_CAP_PASID_MAX_WIDTH" to patch5 (Clement)
>
> - move #include "hw/core/iommu.h" before #include "hw/core/qdev.h" (Liuyi)
> - polish the comment about @Pasid parameter (Liuyi)
> - s/pe/pasid_entry, s/as_it/hiod_it, s/vtd_find_add_pc/vtd_accel_fill_pc
> (Liuyi)
> - s/VTDACCELPASIDCacheEntry/VTDAccelPASIDCacheEntry (Liuyi)
> - add explanation in code about PASID removal before addition (Liuyi)
> - polish the comment about scope of VTDAccelPASIDCacheEntry vs
> VTDPASIDCacheEntry (Liuyi)
> - add an optimization to bypass PASID entry addition for PASID selective
> pv_inv_dsc (Liuyi)
>
> v1:
> - use naming pattern "XXX_SET_THENAME" same as smmu (Clement)
> - fix s->pasid check (Clement)
>
> RFCv2:
> - extend attach/detach_hwpt() instead of introducing new callbacks (Shammer)
> - Define IOMMU_NO_PASID for device attachment without pasid (Nicolin)
> - update vtd_destroy_old_fs_hwpt()'s parameter for naming consistency
> (Clement)
> - check pasid bits size to be no more than 20 bits (Clement)
> - initialize local variable max_pasid_log2 to 0 (Cédric)
>
>
> Zhenzhong Duan (15):
> vfio/iommufd: Extend attach/detach_hwpt callback implementations with
> pasid
> iommufd: Extend attach/detach_hwpt callbacks to support pasid
> vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID
> flag
> intel_iommu: Create the nested hwpt with IOMMU_HWPT_ALLOC_PASID flag
> intel_iommu: Rename pasid property to "pasid-bits" and define it as
> type uint8
> intel_iommu: Export some functions
> intel_iommu: Use IOMMU_NO_PASID and delete PASID_0
> intel_iommu: Refactor PASID processing to use IOMMU_NO_PASID
> internally
> intel_iommu_accel: Handle PASID entry addition for pc_inv_dsc request
> intel_iommu_accel: Handle PASID entry removal for pc_inv_dsc request
> intel_iommu_accel: Bypass PASID entry addition for just deleted entry
> intel_iommu_accel: Handle PASID entry removal for system reset
> intel_iommu_accel: Switch to VTDAccelPASIDCacheEntry for PASID
> bind/unbind and PIOTLB invalidation
> intel_iommu_accel: Add pasid bits size check
> intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED and
> VIOMMU_FLAG_WANT_PASID_ATTACH
>
> hw/i386/intel_iommu_accel.h | 20 +-
> hw/i386/intel_iommu_internal.h | 44 +++-
> include/hw/core/iommu.h | 13 ++
> include/hw/i386/intel_iommu.h | 4 +-
> include/hw/vfio/vfio-device.h | 1 +
> include/system/iommufd.h | 18 +-
> include/system/memory.h | 2 +-
> backends/iommufd.c | 9 +-
> hw/arm/smmuv3-accel.c | 12 +-
> hw/i386/intel_iommu.c | 254 +++++++++-----------
> hw/i386/intel_iommu_accel.c | 414 +++++++++++++++++++++++++++------
> hw/vfio/device.c | 11 +
> hw/vfio/iommufd.c | 56 +++--
> hw/vfio/trace-events | 4 +-
> 14 files changed, 607 insertions(+), 255 deletions(-)
>
