On 5/21/26 08:52, Jamin Lin wrote:
AST1040 is the next-generation device following AST1030 and is
primarily designed as a bridge/BIC controller platform. Introduce
a dedicated AST1040 EVB machine implementation for firmware
development and validation.
Although the existing ast10x0 EVB machine code already provides
a reusable minibmc initialization flow, AST1040 requires
different platform settings, including:
- Different SYSCLK frequency
- Different internal flash size
To avoid overloading the existing AST1030-specific helper,
introduce a separate aspeed_bic_machine_init() implementation in
a dedicated source file.
Signed-off-by: Jamin Lin <[email protected]>
---
hw/arm/aspeed_ast1040_evb.c | 72 +++++++++++++++++++++++++++++++++++++
hw/arm/meson.build | 3 +-
2 files changed, 74 insertions(+), 1 deletion(-)
create mode 100644 hw/arm/aspeed_ast1040_evb.c
No functional test ?
diff --git a/hw/arm/aspeed_ast1040_evb.c b/hw/arm/aspeed_ast1040_evb.c
new file mode 100644
index 0000000000..5851cf6967
--- /dev/null
+++ b/hw/arm/aspeed_ast1040_evb.c
@@ -0,0 +1,72 @@
+/*
+ * ASPEED AST1040 EVB
+ *
+ * Copyright (C) 2026 ASPEED Technology Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/arm/boot.h"
+#include "hw/arm/machines-qom.h"
+#include "hw/arm/aspeed.h"
+#include "hw/arm/aspeed_soc.h"
+#include "hw/core/qdev-clock.h"
+#include "system/system.h"
+
+#define AST1040_INTERNAL_FLASH_SIZE (4 * MiB)
+/* Main SYSCLK frequency in Hz (400MHz) */
+#define SYSCLK_FRQ 400000000ULL
+
+static void aspeed_bic_machine_init(MachineState *machine)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(machine);
+ AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine);
+ Clock *sysclk;
+
+ sysclk = clock_new(OBJECT(machine), "SYSCLK");
+ clock_set_hz(sysclk, SYSCLK_FRQ);
+
+ bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
+ object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
+ object_unref(OBJECT(bmc->soc));
+ qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);
+
+ object_property_set_link(OBJECT(bmc->soc), "memory",
+ OBJECT(get_system_memory()), &error_abort);
+ aspeed_connect_serial_hds_to_uarts(bmc);
+ qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
+
+ armv7m_load_kernel(ARM_CPU(first_cpu),
+ machine->kernel_filename,
+ 0,
+ AST1040_INTERNAL_FLASH_SIZE);
+}
+
+static void aspeed_machine_ast1040_evb_class_init(ObjectClass *oc,
+ const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
+
+ mc->desc = "Aspeed AST1040 BIC EVB (Cortex-M4F)";
+ amc->soc_name = "ast1040-a0";
+ amc->hw_strap1 = 0;
+ amc->hw_strap2 = 0;
+ mc->init = aspeed_bic_machine_init;
mc->default_ram_size = 0; ?
+ amc->macs_mask = 0;
+ amc->uart_default = ASPEED_DEV_UART12;
+ aspeed_machine_class_init_cpus_defaults(mc);
+}
+
+static const TypeInfo aspeed_ast1040_evb_types[] = {
+ {
+ .name = MACHINE_TYPE_NAME("ast1040-evb"),
+ .parent = TYPE_ASPEED_MACHINE,
+ .class_init = aspeed_machine_ast1040_evb_class_init,
+ .interfaces = arm_machine_interfaces,
+ }
+};
+
+DEFINE_TYPES(aspeed_ast1040_evb_types)
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
index fa3a848492..9b75cc7fb1 100644
--- a/hw/arm/meson.build
+++ b/hw/arm/meson.build
@@ -63,7 +63,8 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
'aspeed_ast2600_rainier.c',
'aspeed_ast10x0.c',
'aspeed_ast10x0_evb.c',
- 'aspeed_ast1040.c'))
+ 'aspeed_ast1040.c',
+ 'aspeed_ast1040_evb.c'))
arm_common_ss.add(when: ['CONFIG_ASPEED_SOC', 'TARGET_AARCH64'], if_true:
files(
'aspeed_ast1700.c',
'aspeed_ast27x0.c',
