On Wed, 20 May 2026 at 19:24, Richard Henderson <[email protected]> wrote: > > Signed-off-by: Richard Henderson <[email protected]> > --- > target/arm/helper.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index ae1dd42dc4..7eb7031294 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -787,6 +787,9 @@ static void scr_write(CPUARMState *env, const > ARMCPRegInfo *ri, uint64_t value) > if (cpu_isar_feature(aa64_mec, cpu)) { > valid_mask |= SCR_MECEN; > } > + if (cpu_isar_feature(aa64_fpmr, cpu)) { > + valid_mask |= SCR_ENFPM; > + } > } else { > valid_mask &= ~(SCR_RW | SCR_ST); > if (cpu_isar_feature(aa32_ras, cpu)) { > @@ -3973,6 +3976,9 @@ static void hcrx_write(CPUARMState *env, const > ARMCPRegInfo *ri, > if (cpu_isar_feature(aa64_gcs, cpu)) { > valid_mask |= HCRX_GCSEN; > } > + if (cpu_isar_feature(aa64_fpmr, cpu)) { > + valid_mask |= HCRX_ENFPM; > + } > > /* Clear RES0 bits. */ > env->cp15.hcrx_el2 = value & valid_mask; > @@ -4046,6 +4052,9 @@ uint64_t arm_hcrx_el2_eff(CPUARMState *env) > if (cpu_isar_feature(aa64_gcs, cpu)) { > hcrx |= HCRX_GCSEN; > } > + if (cpu_isar_feature(aa64_fpmr, cpu)) { > + hcrx |= HCRX_ENFPM; > + } > return hcrx; > } > if (arm_feature(env, ARM_FEATURE_EL3) && !(env->cp15.scr_el3 & > SCR_HXEN)) { > -- > 2.43.0
I think we also need arm_emulate_firmware_reset() to set SCR_ENFPM, so we get the "emulating EL3 but starting guest at EL2" case right. Otherwise Reviewed-by: Peter Maydell <[email protected]> thanks -- PMM
