>-----Original Message----- >From: Liu, Yi L <[email protected]> >Subject: Re: [PATCH v5 09/15] intel_iommu_accel: Handle PASID entry addition >for >pc_inv_dsc request > >On 5/22/26 10:44, Duan, Zhenzhong wrote: >> >> >>> -----Original Message----- >>> From: Liu, Yi L <[email protected]> >>> Subject: Re: [PATCH v5 09/15] intel_iommu_accel: Handle PASID entry addition >for >>> pc_inv_dsc request >>> >>> On 5/9/26 12:08, Zhenzhong Duan wrote: >>>> Structure VTDAddressSpace includes some elements suitable for emulated >>>> device and passthrough device without PASID, e.g., address space, >>>> different memory regions, etc, it is also protected by vtd iommu lock, >>>> all these are useless and become a burden for passthrough device with >>>> PASID. >>>> >>>> When there are lots of PASIDs used in one device, the AS and MRs are >>>> all registered to memory core and impact the whole system performance. >>>> >>>> So instead of using VTDAddressSpace to cache pasid entry for each pasid >>>> of a passthrough device, we define a light weight structure >>>> VTDAccelPASIDCacheEntry with only necessary elements for each pasid. We >>>> will use this struct as a parameter to conduct binding/unbinding to >>>> nested hwpt and to record the current bound nested hwpt. It's also >>>> designed to support IOMMU_NO_PASID. >>>> >>>> VTDAccelPASIDCacheEntry is designed to only be used in >intel_iommu_accel.c, >>>> similarly VTDPASIDCacheEntry should only be used in hw/i386/intel_iommu.c >>>> >>>> When guest creates new PASID entries, QEMU will capture the pc_inv_dsc >>>> (pasid cache invalidation) request, walk through each pasid in each >>>> passthrough device for valid pasid entries, create a new >>>> VTDAccelPASIDCacheEntry if not existing yet. >>>> >>>> IOMMU_NO_PASID of passthrough device still need to register MRs in case >>>> guest does not operate in scalable mode. So for IOMMU_NO_PASID, we have >>>> both VTDAPASIDCacheEntry and VTDAccelPASIDCacheEntry. >>> >>> The implementation LGTM. But I got a question to ask here. >>> VTDAPASIDCacheEntry is cached in VTDAddressSpace, while >>> VTDAccelPASIDCacheEntry is cached in VTDHostIOMMUDevice. A natural >>> question is why usingVTDHostIOMMUDevice instead of VTDAddressSpace. I >>> think it might be valuable to mark the reason of this choice. This >>> would help maintaining it in future as we might forgot the reason. :) >> >> Hmm, you mean why not putting VTDAccelPASIDCacheEntry list in >VTDAddressSpace? >> There is explanation above, paste here: >> >> VTDAccelPASIDCacheEntry is designed to only be used in >> intel_iommu_accel.c, >> similarly VTDPASIDCacheEntry should only be used in hw/i386/intel_iommu.c > > >hmmm. code isolation is a good reason. Is there any other reason?
Could you hint?:) The first four paragraphs in commit log showed all rationales I can think of about not using VTDAddressSpace. Thanks Zhenzhong
