> -----Original Message-----
> From: Philippe Mathieu-Daudé <[email protected]>
> Sent: 20 May 2026 03:18
> To: Gaurav Sharma <[email protected]>; [email protected]
> Cc: [email protected]; [email protected]; [email protected];
> Zhao Liu <[email protected]>; Pierrick Bouvier
> <[email protected]>; Markus Armbruster
> <[email protected]>; Alistair Francis <[email protected]>; Daniel
> Henrique Barboza <[email protected]>
> Subject: [EXT] Re: [PATCHv1 6/7] hw/arm: Enable Cortex-M7 AMP boot on
> i.MX8MP
>
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>
> On 19/5/26 23:45, Philippe Mathieu-Daudé wrote:
> > Hi Gaurav,
> >
> > On 19/5/26 19:56, Gaurav Sharma wrote:
> >> Configure the i.MX8MP to boot the Cortex-M7 core alongside the
> >> Cortex-A53 cores in an Asymmetric Multiprocessing (AMP)
> >> configuration. The M7 firmware can be loaded and started from Linux
> >> running on the A53 cores via the remoteproc framework.
> >>
> >> CM7 boot is made optional. A GPR IRQ is connected to a cpuwait handler.
> >> The handler translates the CPUWAIT into STOP and RUN.It follows the
> >> classic Cortex-M boot sequence: initial SP and reset vector taken
> >> from the vector table.
> >>
> >> Signed-off-by: Gaurav Sharma <[email protected]>
> >> ---
> >> docs/system/arm/imx8m.rst | 86 +++++++++++++++++++++-
> >> hw/arm/fsl-imx8mp.c | 143
> ++++++++++++++++++++++++++++++++++++
> >> include/hw/arm/fsl-imx8mp.h | 13 +++-
> >> 3 files changed, 240 insertions(+), 2 deletions(-)
> >
> >
> >> @@ -72,7 +155,8 @@ For i.MX 8M Plus EVK:
> >> .. code-block:: bash
> >> $ qemu-system-aarch64 -M imx8mp-evk \
> >> - -display none -serial null -serial stdio \
> >> + -display none -serial null -serial stdio -serial null -serial
> >> + /
> >> tmp/imx8mp-uart4 \
> >> + -smp 4,maxcpus=5 -global fsl-imx8mp.enable-cm7=on \
> >
> > Not a blocker; I wonder if this is a good use of the -smp/maxcpus
> > (thinking about long term AMP modelling).
> >
> > Maybe we could use a machine property for the M core, and keep the smp
> > default value to the A core cluster:
> >
> > -M imx8mp-evk,enable_cm7=on -smp 4
>
> I missed you already add a machine 'enable-cm7' property in this very same
> patch :)
>
> static const Property fsl_imx8mp_properties[] = {
> DEFINE_PROP_UINT32("fec1-phy-num", FslImx8mpState, phy_num, 0),
> DEFINE_PROP_BOOL("fec1-phy-connected", FslImx8mpState,
> phy_connected, true),
> + DEFINE_PROP_BOOL("enable-cm7", FslImx8mpState, enable_cm7, false),
> + DEFINE_PROP_UINT32("cm7-vector-base", FslImx8mpState,
> + cm7_vector_base, 0x80000000),
> };
>
> >
> > But IMHO even better is to always create all cores like on real
> > hardware. If the M7 is not used it is just sitting here, created and
> > halted, not disturbing anything. Personally I'd rather not accepting
> > any -smp option for such machine, just reporting an error if used "Can
> > not restrict this machine, it is always created with 4 Cortex A and 1
> > Cortex M".
> >
Hi Philippe,
Since the emulation should be as close to the hardware as possible, that means
we can always leave the M7 realized (even if it is not being used). Wouldn't it
be better to avoid passing 'smp' , 'maxcpus' or even 'enable-cm7' in the cli ?
We can configure the defaults instead. A simple "qemu-system-aarch64 -M
imx8mp-evk" should suffice.
> >> static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
> >> {
> >> MachineState *ms = MACHINE(qdev_get_machine()); @@ -277,6
> >> +368,23 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error
> >> **errp)
> >> const char *cpu_type = ms->cpu_type ?:
> >> ARM_CPU_TYPE_NAME("cortex-a53");
> >> int i;
> >> + if (!s->enable_cm7) {
> >> + object_unparent(OBJECT(&s->cm7));
> >> + } else {
> >> + /*
> >> + * When CM7 is enabled we need one additional vCPU
> >> + * slot. If the user does not specify maxcpus=,
> >> + * QEMU defaults maxcpus to the current -smp count.
> >> + */
> >> + unsigned int need = ms->smp.cpus + 1;
> >> + if (ms->smp.max_cpus < need) {
> >> + error_setg(errp,
> >> + "CM7 enabled requires -smp %u,maxcpus=%u (one
> >> extra vCPU slot for CM7)",
> >> + ms->smp.cpus, need);
> >> + return;
> >> + }
> >> + }
