On 5/27/26 5:56 PM, Khushit Shah wrote: > So you are saying, if I do, > -cpu host,sve=on,SYSREG_ID_AA64PFR0_SVE=0 > QEMU will still show sve capabilities to the guest? Yes that's what I expect. Require more extensive testing though. That could be way to handle coexistence of different levels of granulaity. Lowest level applies first, overriden by legacy compositive options. I guess if you plan to introduce other layers of compositive props you will most probably handle this situation too. Thanks Eric
- Re: [PATCH v5 16/18] target/arm/cpu: Expose writable ID reg ... Sebastian Ott
- Re: [PATCH v5 16/18] target/arm/cpu: Expose writable ID... Khushit Shah
- Re: [PATCH v5 16/18] target/arm/cpu: Expose writabl... Eric Auger
- Re: [PATCH v5 16/18] target/arm/cpu: Expose wri... Khushit Shah
- Re: [PATCH v5 16/18] target/arm/cpu: Expose... Eric Auger
- Re: [PATCH v5 16/18] target/arm/cpu: E... Khushit Shah
- Re: [PATCH v5 16/18] target/arm/cp... Eric Auger
- Re: [PATCH v5 16/18] target/ar... Khushit Shah
- Re: [PATCH v5 16/18] target/ar... Eric Auger
- Re: [PATCH v5 16/18] target/arm/cp... Eric Auger
