On 28/5/26 22:02, Pierrick Bouvier wrote:
On 5/28/2026 12:59 PM, Philippe Mathieu-Daudé wrote:
On 28/5/26 20:47, Pierrick Bouvier wrote:
On 5/28/2026 11:47 AM, Pierrick Bouvier wrote:
On 5/28/2026 7:08 AM, Philippe Mathieu-Daudé wrote:
Initialize the TypeInfo structure at runtime using the TargetInfo
API to resolve TYPE_ACCEL_CPU, replacing CPU_RESOLVING_TYPE by
target_cpu_type(). Since the code is no more target-specific, move
it to accel-common.c, removing the need for accel-target.c.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
Cc: Pierrick Bouvier <[email protected]>
Pierrick, this is an alternative for both
[email protected]
and
[email protected]
for your "single-binary: fix compilation/execution for {arm,
aarch32, microblaze}" series. WDYT?
---
accel/accel-common.c | 15 +++++++++++++++
accel/accel-target.c | 41 -----------------------------------------
accel/meson.build | 1 -
3 files changed, 15 insertions(+), 42 deletions(-)
delete mode 100644 accel/accel-target.c
diff --git a/accel/meson.build b/accel/meson.build
index 7da12b9741f..1b5b37e3097 100644
--- a/accel/meson.build
+++ b/accel/meson.build
@@ -1,5 +1,4 @@
common_ss.add(files('accel-common.c'))
-specific_ss.add(files('accel-target.c'))
system_ss.add(files('accel-system.c', 'accel-blocker.c', 'accel-
qmp.c', 'accel-irq.c'))
user_ss.add(files('accel-user.c'))
I'm open to follow this approach first .
The only downside is that it limits to a single accelerator parent type,
which will be a problem as soon as we have two arch using this framework
for tcg. Nothing we can't solve later though.
Good point. I'll see how to handle that (as a following up patch).
Maybe we need to duplicate this struct for each base architecture? :)
Back to your patch? I was never fond of AccelCPUClass and its QOM use,
ended to ditch it completly:
https://lore.kernel.org/qemu-devel/[email protected]/
Regards,
Pierrick
Forgot :)
Reviewed-by: Pierrick Bouvier <[email protected]>
