Hi, Peter, On Sat, May 30, 2026 at 1:53 AM Peter Maydell <[email protected]> wrote: > > On Fri, 29 May 2026 at 16:52, Peter Maydell <[email protected]> wrote: > > > > On Fri, 29 May 2026 at 15:42, Huacai Chen <[email protected]> wrote: > > > > > > Qemu fw_cfg support was missing for LoongArch, which made some functions > > > unusable in virtual machines. So add the missing LoongArch defines. > > > > > > Signed-off-by: Huacai Chen <[email protected]> > > > --- > > > drivers/firmware/Kconfig | 2 +- > > > drivers/firmware/qemu_fw_cfg.c | 2 +- > > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig > > > index bbd2155d8483..9ec747716389 100644 > > > --- a/drivers/firmware/Kconfig > > > +++ b/drivers/firmware/Kconfig > > > @@ -121,7 +121,7 @@ config RASPBERRYPI_FIRMWARE > > > > > > config FW_CFG_SYSFS > > > tristate "QEMU fw_cfg device support in sysfs" > > > - depends on SYSFS && (ARM || ARM64 || PARISC || PPC_PMAC || RISCV > > > || SPARC || X86) > > > + depends on SYSFS && (ARM || ARM64 || LOONGARCH || PARISC || > > > PPC_PMAC || RISCV || SPARC || X86) > > > depends on HAS_IOPORT_MAP > > > default n > > > help > > > diff --git a/drivers/firmware/qemu_fw_cfg.c > > > b/drivers/firmware/qemu_fw_cfg.c > > > index 87a5421bc7d5..0c51a9df589f 100644 > > > --- a/drivers/firmware/qemu_fw_cfg.c > > > +++ b/drivers/firmware/qemu_fw_cfg.c > > > @@ -211,7 +211,7 @@ static void fw_cfg_io_cleanup(void) > > > > > > /* arch-specific ctrl & data register offsets are not available in ACPI, > > > DT */ > > > #if !(defined(FW_CFG_CTRL_OFF) && defined(FW_CFG_DATA_OFF)) > > > -# if (defined(CONFIG_ARM) || defined(CONFIG_ARM64) || > > > defined(CONFIG_RISCV)) > > > +# if (defined(CONFIG_ARM) || defined(CONFIG_ARM64) || > > > defined(CONFIG_LOONGARCH) || defined(CONFIG_RISCV)) > > > # define FW_CFG_CTRL_OFF 0x08 > > > # define FW_CFG_DATA_OFF 0x00 > > > # define FW_CFG_DMA_OFF 0x10 > > > > On the QEMU specification side we could probably nail this down > > to "x86, sun, ppc, parisc have funny register layouts for > > legacy reasons and all others have the 8-bytes-apart layout", > > which might help to avoid having all this architecture-specific > > ifdeffery changing for each new architecture, if that's > > something people care about. > > I sent this QEMU patchset proposing that (and cleaning > up some of the implementation to make it less likely that > we add fw_cfg to any new board types with different layouts > from the arm/riscv/loongarch "standard" one): > > https://lore.kernel.org/qemu-devel/[email protected]/ Thank you for your effort.
Huacai > > -- PMM
