Hi Eric,
> -----Original Message----- > From: Eric Auger <[email protected]> > Sent: 19 May 2026 14:27 > To: [email protected]; [email protected]; qemu- > [email protected]; [email protected]; [email protected]; > [email protected]; [email protected]; > [email protected]; [email protected]; > [email protected]; [email protected]; [email protected]; > Shameer Kolothum Thodi <[email protected]>; [email protected] > Cc: [email protected]; [email protected]; [email protected]; > [email protected]; [email protected]; [email protected]; > [email protected] > Subject: [PATCH v5 04/18] arm/cpu: Add infra to handle generated ID register > definitions > > External email: Use caution opening links or attachments > > > The known ID regs are populated in a new initialization function > named initialize_cpu_sysreg_properties(). That code will be > automatically generated from AARCHMRS Registers.json. For the > time being let's just describe a single id reg, CTR_EL0. In this > description we only care about non RES/RAZ fields, ie. named fields. > > The registers are populated in an array indexed by ARMIDRegisterIdx > and their fields are added in a sorted list. > > Signed-off-by: Eric Auger <[email protected]> > Signed-off-by: Cornelia Huck <[email protected]> > > --- > > v4 -> v5 > - ifdef TARGET_ARM_CPU_IDREGS_H > - s/g_list_append/g_list_prepend > - void arm64_sysreg_add_field() Looks like this patch is missing the above and file: target/arm/cpu-sysreg-properties.c Please check. Thanks, Shameer > --- > target/arm/cpu-idregs.h | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 target/arm/cpu-idregs.h > > diff --git a/target/arm/cpu-idregs.h b/target/arm/cpu-idregs.h > new file mode 100644 > index 0000000000..664e2d6ddd > --- /dev/null > +++ b/target/arm/cpu-idregs.h > @@ -0,0 +1,33 @@ > +/* > + * handle ID registers and their fields > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + */ > +#ifndef TARGET_ARM_CPU_IDREGS_H > +#define TARGET_ARM_CPU_IDREGS_H > + > +#include "qemu/osdep.h" > +#include "qemu/error-report.h" > +#include "cpu.h" > +#include "cpu-sysregs.h" > + > +typedef struct ARM64SysRegField { > + const char *name; /* name of the field, for instance CTR_EL0_IDC */ > + ARMIDRegisterIdx index; /* parent register, e.g. CTR_EL0_IDX */ > + int shift; /* lsb of the field in the register */ > + int length; /* highest bit number */ > +} ARM64SysRegField; > + > +typedef struct ARM64SysReg { > + const char *name; /* name of the sysreg, for instance CTR_EL0 */ > + ARMIDRegisterIdx index; /* register index, e.g. CTR_EL0_IDX */ > + struct ARM64SysRegField *fields; > + uint32_t fields_count; > +} ARM64SysReg; > + > +/* > + * List of exposed ID regs (automatically populated from AARCHMRS > Registers.json) > + */ > +extern ARM64SysReg arm64_id_regs[NUM_ID_IDX]; > + > +#endif > -- > 2.53.0
