Re: [PATCH v4 17/21] hw/misc/aspeed_scu: Add AST2700 SCUIO RNG control and data registers

[Cédric Le Goater]

On 4/17/26 05:29, Jamin Lin wrote:

Implement basic behavior for RNG_CTRL and RNG_DATA:

- RNG_CTRL allows guest to enable/disable the RNG via the DIS bit.
   Only bits [0:3] and bit 5 are writable; other bits are masked.
- The VLD bit (bit 31) is updated by the model to reflect the RNG
   enable state, and is not writable by the guest.
- When RNG is enabled, reads from RNG_DATA return a newly generated
   random value.
- When RNG is disabled, RNG_DATA return 0.

This provides a minimal functional model of the RNG sufficient for
software that expects readable random data without modeling full
hardware behavior.

please send first.

Thanks,

C.

Signed-off-by: Jamin Lin <jamin_...@aspeedtech.com>
---
  hw/misc/aspeed_scu.c | 25 +++++++++++++++++++++++++
  1 file changed, 25 insertions(+)

diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 362733ba11..f9ae65d83c 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -187,6 +187,11 @@
  #define AST2700_SCU_CPU_SCRATCH_1   TO_REG(0x784)
  #define AST2700_SCU_VGA_SCRATCH_0   TO_REG(0x900)

+#define AST2700_SCUIO_RNG_CTRL TO_REG(0xF0)

+#define AST2700_SCUIO_RNG_CTRL_MASK     0x2F
+#define AST2700_SCUIO_RNG_CTRL_DIS      BIT(0)
+#define AST2700_SCUIO_RNG_CTRL_VLD      BIT(31)
+#define AST2700_SCUIO_RNG_DATA          TO_REG(0xF4)
  #define AST2700_SCUIO_CLK_STOP_CTL_1    TO_REG(0x240)
  #define AST2700_SCUIO_CLK_STOP_CLR_1    TO_REG(0x244)
  #define AST2700_SCUIO_CLK_STOP_CTL_2    TO_REG(0x260)
@@ -1257,6 +1262,14 @@ static uint64_t aspeed_ast2700_scuio_read(void *opaque, 
hwaddr offset,
          return 0;
      }

+ switch (reg) {

+    case AST2700_SCUIO_RNG_DATA:
+        if (!(s->regs[AST2700_SCUIO_RNG_CTRL] & AST2700_SCUIO_RNG_CTRL_DIS)) {
+            s->regs[AST2700_SCUIO_RNG_DATA] = aspeed_scu_get_random();
+        }
+        break;
+    }
+
      trace_aspeed_ast2700_scuio_read(offset, size, s->regs[reg]);
      return s->regs[reg];
  }
@@ -1280,6 +1293,18 @@ static void aspeed_ast2700_scuio_write(void *opaque, 
hwaddr offset,
      trace_aspeed_ast2700_scuio_write(offset, size, data);

switch (reg) {

+    case AST2700_SCUIO_RNG_CTRL:
+        data &= AST2700_SCUIO_RNG_CTRL_MASK;
+        if (data & AST2700_SCUIO_RNG_CTRL_DIS) {
+            data &= ~AST2700_SCUIO_RNG_CTRL_VLD;
+            s->regs[AST2700_SCUIO_RNG_DATA] = 0;
+        } else {
+            s->regs[AST2700_SCUIO_RNG_DATA] = aspeed_scu_get_random();
+            data |= AST2700_SCUIO_RNG_CTRL_VLD;
+        }
+        s->regs[reg] = data;
+        updated = true;
+        break;
      case AST2700_SCUIO_CLK_STOP_CTL_1:
      case AST2700_SCUIO_CLK_STOP_CTL_2:
          s->regs[reg] |= data;