From: Arun Menon <[email protected]> - Add new fields to the CRB Interface Identifier and the CRB Control Start registers. - CRB_CTRL_START now has 2 new settings, that can be toggled using the nextChunk and crbRspRetry bits. - CapCRBChunk bit (10) was Reserved1 previously. The field is reused in this revision of the specification. Refer to section 6.4.2.2 of [1] - Add hw_compat global property called cap-chunk because the chunking feature is only supported for machine type 11.1 and higher.
[1] https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific-Platform-TPM-Profile-for-TPM-2p0-v1p07_Pub.pdf Signed-off-by: Arun Menon <[email protected]> Reviewed-by: Stefan Berger <[email protected]> Reviewed-by: Marc-André Lureau <[email protected]> Link: https://lore.kernel.org/qemu-devel/[email protected] Signed-off-by: Stefan Berger <[email protected]> --- hw/core/machine.c | 1 + hw/tpm/tpm_crb.c | 6 ++++++ include/hw/acpi/tpm.h | 5 ++++- 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 63baff859f..00eb3432a7 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -41,6 +41,7 @@ GlobalProperty hw_compat_11_0[] = { { "chardev-vc", "encoding", "cp437" }, + { "tpm-crb", "cap-chunk", "off" }, }; const size_t hw_compat_11_0_len = G_N_ELEMENTS(hw_compat_11_0); diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 02701ab948..bfa09c04cf 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -44,6 +44,8 @@ struct CRBState { size_t be_buffer_size; TPMPPI ppi; + + bool cap_chunk; }; typedef struct CRBState CRBState; @@ -58,6 +60,7 @@ DECLARE_INSTANCE_CHECKER(CRBState, CRB, #define CRB_INTF_CAP_FIFO_NOT_SUPPORTED 0b0 #define CRB_INTF_CAP_CRB_SUPPORTED 0b1 #define CRB_INTF_IF_SELECTOR_CRB 0b1 +#define CRB_INTF_CAP_CRB_CHUNK 0b1 #define CRB_CTRL_CMD_SIZE (TPM_CRB_ADDR_SIZE - A_CRB_DATA_BUFFER) @@ -227,6 +230,7 @@ static const VMStateDescription vmstate_tpm_crb = { static const Property tpm_crb_properties[] = { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), + DEFINE_PROP_BOOL("cap-chunk", CRBState, cap_chunk, true), }; static void tpm_crb_reset(void *dev) @@ -258,6 +262,8 @@ static void tpm_crb_reset(void *dev) CapCRB, CRB_INTF_CAP_CRB_SUPPORTED); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, InterfaceSelector, CRB_INTF_IF_SELECTOR_CRB); + ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, + CapCRBChunk, s->cap_chunk ? CRB_INTF_CAP_CRB_CHUNK : 0); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID, RID, 0b0000); ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID2, diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index 2ab186a745..782dc8212c 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -150,7 +150,7 @@ REG32(CRB_INTF_ID, 0x30) FIELD(CRB_INTF_ID, InterfaceVersion, 4, 4) FIELD(CRB_INTF_ID, CapLocality, 8, 1) FIELD(CRB_INTF_ID, CapCRBIdleBypass, 9, 1) - FIELD(CRB_INTF_ID, Reserved1, 10, 1) + FIELD(CRB_INTF_ID, CapCRBChunk, 10, 1) FIELD(CRB_INTF_ID, CapDataXferSizeSupport, 11, 2) FIELD(CRB_INTF_ID, CapFIFO, 13, 1) FIELD(CRB_INTF_ID, CapCRB, 14, 1) @@ -169,6 +169,9 @@ REG32(CRB_CTRL_STS, 0x44) FIELD(CRB_CTRL_STS, tpmIdle, 1, 1) REG32(CRB_CTRL_CANCEL, 0x48) REG32(CRB_CTRL_START, 0x4C) + FIELD(CRB_CTRL_START, Start, 0, 1) + FIELD(CRB_CTRL_START, crbRspRetry, 1, 1) + FIELD(CRB_CTRL_START, nextChunk, 2, 1) REG32(CRB_INT_ENABLED, 0x50) REG32(CRB_INT_STS, 0x54) REG32(CRB_CTRL_CMD_SIZE, 0x58) -- 2.54.0
