On 30/05/26 1:19 AM, Philippe Mathieu-Daudé wrote:
Could get re-review: 4 & 5
Move cpu_init/realize hooks from AccelCPUClass to
AccelOpsClass. Specialize them for TCG in TCGCPUOps.
This drastically simplifies the need of per-binary QOM
types per accelerator per target (see also the nice
diff-stat).
Based-on: tag single-binary-20260528
Hi Philippe,
I have tested this patch series on ppc64 (pseries) in both KVM and TCG
acceleration modes and it seems to work as expected.
So, feel free to add
Tested-by: Anushree Mathur <[email protected]>
I am sharing logs below:
smp as 8 and maxcpus as 64
i) Guest bringup with sockets 2 cores 16 and threads 2
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 16
Socket(s): 2
ii) Guest bringup with sockets 2 cores 8 and threads 4
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 8
On-line CPU(s) list: 0-7
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 4
Core(s) per socket: 2
Socket(s): 1
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 4
Core(s) per socket: 8
Socket(s): 2
iii) Guest bringup with sockets 2 cores 4 and threads 8
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 8
On-line CPU(s) list: 0-7
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 8
Core(s) per socket: 1
Socket(s): 1
After hotplug:
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 8
Core(s) per socket: 4
Socket(s): 2
iv) Guest bringup with sockets 4 cores 2 and threads 8
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 8
On-line CPU(s) list: 0-7
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 8
Core(s) per socket: 1
Socket(s): 1
After cpu hotplug
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 8
Core(s) per socket: 2
Socket(s): 4
v) Guest bringup with sockets 8 cores 1 and threads 8
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 8
On-line CPU(s) list: 0-7
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 8
Core(s) per socket: 1
Socket(s): 1
After hotplug :
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 8
Core(s) per socket: 1
Socket(s): 8
Trying all scenarios without any maxcpus :
i) Guest bringup with sockets 8 cores 1 and threads 8
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 8
Core(s) per socket: 1
Socket(s): 8
ii) Guest bringup with sockets 8 cores 2 and threads 4
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 4
Core(s) per socket: 2
Socket(s): 8
iii) Guest bringup with sockets 8 cores 4 and threads 2
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 4
Socket(s): 8
iv) Guest bringup with sockets 4 cores 8 and threads 2
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 8
Socket(s): 4
v) Guest bringup with sockets 2 cores 16 and threads 2
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 64
On-line CPU(s) list: 0-63
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 16
Socket(s): 2
vi) Different smp values :
a) 32
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 32
On-line CPU(s) list: 0-31
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 8
Socket(s): 2
b) 16
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 16
On-line CPU(s) list: 0-15
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 4
Socket(s): 2
c) 8
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 8
On-line CPU(s) list: 0-7
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 2
Socket(s): 2
d) 4
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 1
Socket(s): 2
e) 2
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 2
On-line CPU(s) list: 0,1
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 2
Core(s) per socket: 1
Socket(s): 1
f) 1
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 1
On-line CPU(s) list: 0
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 1
Core(s) per socket: 1
Socket(s): 1
iii) smp without any topology:
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 32
On-line CPU(s) list: 0-31
Model name: Power11 (architected), altivec supported
Model: 2.0 (pvr 0082 0200)
Thread(s) per core: 1
Core(s) per socket: 1
Socket(s): 32
iv) TCG tests:
a) smp 32 without topology :
/home/Anu/qemu/build/qemu-system-ppc64 -name
guest=sles16_migrate,debug-threads=on -S -object
{"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain-18-sles16_migrate/master-key.aes"}
-machine
pseries-10.2,usb=off,dump-guest-core=off,memory-backend=ppc_spapr.ram
-accel tcg -cpu POWER11 -m size=16777216k -object
{"qom-type":"memory-backend-ram","id":"ppc_spapr.ram","size":17179869184}
-overcommit mem-lock=off -smp 32,sockets=32,cores=1,threads=1
b) smp 16 with topology
Threads 2 :
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 16
On-line CPU(s) list: 0-15
Model name: Power11 (architected), altivec supported
Model: 18.0 (pvr 0082 1200)
Thread(s) per core: 2
Core(s) per socket: 1
Socket(s): 8
Threads 4:
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 16
On-line CPU(s) list: 0-15
Model name: Power11 (architected), altivec supported
Model: 18.0 (pvr 0082 1200)
Thread(s) per core: 4
Core(s) per socket: 1
Socket(s): 4
Threads 8:
localhost:~ # lscpu
Architecture: ppc64le
Byte Order: Little Endian
CPU(s): 16
On-line CPU(s) list: 0-15
Model name: Power11 (architected), altivec supported
Model: 18.0 (pvr 0082 1200)
Thread(s) per core: 8
Core(s) per socket: 2
Socket(s): 1
Virtualization features:
Thank you
Anushree Mathur
Ignoring checkpatch.pl:
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
accel/accel-target.c
include/accel/accel-cpu-target.h
include/accel/accel-cpu.h
$ git backport-diff since v1:
[----] : patches are identical
[####] : number of functional differences between upstream/downstream patch
[down] : patch is downstream-only
The flags [FC] indicate (F)unctional and (C)ontextual differences,
respectively
001/ 17:[----] [--] 'target/loongarch: Remove unused
'accel/accel-cpu-target.h' header'
002/ 17:[----] [--] 'accel: Remove AccelCPUClass::cpu_class_init()'
003/ 17:[----] [--] 'accel: Rename AccelOpsClass::cpu_target_realize()
-> cpu_realize()'
004/ 17:[----] [--] 'accel/hvf: Remove need for
AccelCPUClass::cpu_realize'
005/ 17:[----] [--] 'accel/kvm: Remove need for
AccelCPUClass::cpu_realize'
006/ 17:[----] [--] 'accel: Introduce AccelOpsClass::cpu_instance_init
handler'
007/ 17:[----] [--] 'accel/whpx: Convert AccelCPUClass ->
AccelOpsClass::cpu_instance_init'
008/ 17:[0002] [FC] 'accel/nvmm: Convert AccelCPUClass ->
AccelOpsClass::cpu_instance_init'
009/ 17:[0002] [FC] 'accel/hvf: Convert AccelCPUClass ->
AccelOpsClass::cpu_instance_init'
010/ 17:[0016] [FC] 'accel/kvm: Convert AccelCPUClass ->
AccelOpsClass::cpu_instance_init'
011/ 17:[----] [--] 'accel/tcg: Convert AccelCPUClass -> new
TCGCPUOps::cpu_instance_init'
012/ 17:[----] [--] 'accel: Remove AccelCPUClass::cpu_instance_init()'
013/ 17:[----] [--] 'accel/tcg: Convert AccelCPUClass -> new
TCGCPUOps::cpu_realize'
014/ 17:[----] [--] 'accel/tcg: Convert X86 AccelCPUClass ->
TCGCPUOps::cpu_realize'
015/ 17:[----] [--] 'accel/tcg: Convert RISCV AccelCPUClass ->
TCGCPUOps::cpu_realize'
016/ 17:[----] [--] 'accel: Remove AccelCPUClass::cpu_target_realize()'
017/ 17:[----] [--] 'accel: Remove AccelCPUClass and
'accel/accel-cpu-target.h''
diff --git a/include/system/kvm.h b/include/system/kvm.h
index 2c31fa6019e..a249f076763 100644
--- a/include/system/kvm.h
+++ b/include/system/kvm.h
@@ -225,0 +226,3 @@ void kvm_irqchip_change_notify(void);
+void kvm_arch_cpu_instance_init(CPUState *cpu);
+bool kvm_arch_cpu_realize(CPUState *cpu, Error **errp);
+
@@ -367,3 +369,0 @@ int kvm_arch_destroy_vcpu(CPUState *cpu);
-void kvm_arch_cpu_instance_init(CPUState *cpu);
-bool kvm_arch_cpu_realize(CPUState *cpu, Error **errp);
-
diff --git a/accel/kvm/kvm-accel-ops.c b/accel/kvm/kvm-accel-ops.c
index 113a23f2384..edad3c1acea 100644
--- a/accel/kvm/kvm-accel-ops.c
+++ b/accel/kvm/kvm-accel-ops.c
@@ -101 +101 @@ static void kvm_accel_ops_class_init(ObjectClass *oc, const
void *data)
- ops->cpu_target_realize = kvm_arch_cpu_realize;
+ ops->cpu_realize = kvm_arch_cpu_realize;
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 7d194ea112b..0f1a98b430f 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -1785,0 +1786,9 @@ void kvm_arch_accel_class_init(ObjectClass *oc)
+void kvm_arch_cpu_instance_init(CPUState *cpu)
+{
+}
+
+bool kvm_arch_cpu_realize(CPUState *cpu, Error **errp)
+{
+ return true;
+}
+
diff --git a/target/i386/hvf/hvf-cpu.c b/target/i386/hvf/hvf-cpu.c
index 5d74ca6fd56..536bcecd7d2 100644
--- a/target/i386/hvf/hvf-cpu.c
+++ b/target/i386/hvf/hvf-cpu.c
@@ -58 +58 @@ static void hvf_cpu_xsave_init(void)
-void hvf_arch_cpu_instance_init(CPUState *cpu)
+void hvf_arch_cpu_instance_init(CPUState *cs)
diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c
index 10ab7b2a4dc..2973e28122a 100644
--- a/target/i386/nvmm/nvmm-all.c
+++ b/target/i386/nvmm/nvmm-all.c
@@ -1214 +1214 @@ static const TypeInfo nvmm_accel_type = {
-void nvmm_arch_cpu_instance_init(CPUState *cpu)
+void nvmm_arch_cpu_instance_init(CPUState *cs)
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index 9d844c4905a..167fdd515be 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -1497,0 +1498,9 @@ void kvm_arch_accel_class_init(ObjectClass *oc)
+
+void kvm_arch_cpu_instance_init(CPUState *cpu)
+{
+}
+
+bool kvm_arch_cpu_realize(CPUState *cpu, Error **errp)
+{
+ return true;
+}
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 013f5e852e1..894962d509f 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -2354,0 +2355,4 @@ static void alter_insns(uint64_t *word, uint64_t
flags, bool on)
+void kvm_arch_cpu_instance_init(CPUState *cpu)
+{
+}
+
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 2e4f435c537..46730e72a92 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target/s390x/kvm/kvm.c
@@ -2613,0 +2614,9 @@ void kvm_arch_accel_class_init(ObjectClass *oc)
+
+void kvm_arch_cpu_instance_init(CPUState *cpu)
+{
+}
+
+bool kvm_arch_cpu_realize(CPUState *cpu, Error **errp)
+{
+ return true;
+}
Philippe Mathieu-Daudé (17):
target/loongarch: Remove unused 'accel/accel-cpu-target.h' header
accel: Remove AccelCPUClass::cpu_class_init()
accel: Rename AccelOpsClass::cpu_target_realize() -> cpu_realize()
accel/hvf: Remove need for AccelCPUClass::cpu_realize
accel/kvm: Remove need for AccelCPUClass::cpu_realize
accel: Introduce AccelOpsClass::cpu_instance_init handler
accel/whpx: Convert AccelCPUClass -> AccelOpsClass::cpu_instance_init
accel/nvmm: Convert AccelCPUClass -> AccelOpsClass::cpu_instance_init
accel/hvf: Convert AccelCPUClass -> AccelOpsClass::cpu_instance_init
accel/kvm: Convert AccelCPUClass -> AccelOpsClass::cpu_instance_init
accel/tcg: Convert AccelCPUClass -> new TCGCPUOps::cpu_instance_init
accel: Remove AccelCPUClass::cpu_instance_init()
accel/tcg: Convert AccelCPUClass -> new TCGCPUOps::cpu_realize
accel/tcg: Convert X86 AccelCPUClass -> TCGCPUOps::cpu_realize
accel/tcg: Convert RISCV AccelCPUClass -> TCGCPUOps::cpu_realize
accel: Remove AccelCPUClass::cpu_target_realize()
accel: Remove AccelCPUClass and 'accel/accel-cpu-target.h'
accel/tcg/tcg-accel-ops.h | 1 +
include/accel/accel-cpu-ops.h | 3 +-
include/accel/accel-cpu-target.h | 31 --------------
include/accel/accel-cpu.h | 23 -----------
include/accel/tcg/cpu-ops.h | 2 +
include/system/hvf_int.h | 1 +
include/system/kvm.h | 3 ++
target/i386/nvmm/nvmm-accel-ops.h | 2 +
accel/accel-common.c | 68 ++++---------------------------
accel/hvf/hvf-accel-ops.c | 3 +-
accel/kvm/kvm-accel-ops.c | 2 +
accel/tcg/cpu-exec.c | 15 ++++++-
accel/tcg/tcg-accel-ops.c | 1 +
accel/whpx/whpx-accel-ops.c | 2 +
accel/whpx/whpx-common.c | 17 --------
target/arm/hvf/hvf.c | 4 ++
target/arm/kvm.c | 9 ++++
target/arm/whpx/whpx-all.c | 1 -
target/i386/hvf/hvf-cpu.c | 25 ++----------
target/i386/hvf/hvf.c | 5 ---
target/i386/kvm/kvm-cpu.c | 25 +-----------
target/i386/nvmm/nvmm-accel-ops.c | 2 +
target/i386/nvmm/nvmm-all.c | 19 +--------
target/i386/tcg/tcg-cpu.c | 28 ++-----------
target/i386/whpx/whpx-all.c | 1 -
target/loongarch/kvm/kvm.c | 9 ++++
target/loongarch/tcg/tcg_cpu.c | 1 -
target/ppc/kvm.c | 27 +++---------
target/riscv/kvm/kvm-cpu.c | 33 +--------------
target/riscv/tcg/tcg-cpu.c | 28 +++----------
target/s390x/kvm/kvm.c | 9 ++++
31 files changed, 95 insertions(+), 305 deletions(-)
delete mode 100644 include/accel/accel-cpu-target.h
delete mode 100644 include/accel/accel-cpu.h
