On Tue, May 26, 2026 at 10:34:04AM +0200, Philippe Mathieu-Daudé wrote: Hi Philippe,
> Hi Sai, > > On 20/12/24 02:54, Alistair Francis wrote: > > From: Sai Pavan Boddu <[email protected]> > > > > Add a basic board with interrupt controller (intc), timer, serial > > (uartlite), small memory called LMB@0 (128kB) and DDR@0x80000000 > > (configured via command line eg. -m 2g). > > This is basic configuration which matches HW generated out of AMD Vivado > > (design tools). But initial configuration is going beyond what it is > > configured by default because validation should be done on other > > configurations too. That's why wire also additional uart16500, axi > > ethernet(with axi dma). > > GPIOs, i2c and qspi is also listed for completeness. > > > > IRQ map is: (addr) > > 0 - timer (0x41c00000) > > 1 - uartlite (0x40600000) > > 2 - i2c (0x40800000) > > 3 - qspi (0x44a00000) > > 4 - uart16550 (0x44a10000) > > 5 - emaclite (0x40e00000) > > 6 - timer2 (0x41c10000) > > 7 - axi emac (0x40c00000) > > 8 - axi dma (0x41e00000) > > 9 - axi dma > > 10 - gpio (0x40000000) > > 11 - gpio2 (0x40010000) > > 12 - gpio3 (0x40020000) > > > > Signed-off-by: Sai Pavan Boddu <[email protected]> > > Signed-off-by: Michal Simek <[email protected]> > > Reviewed-by: Alistair Francis <[email protected]> > > Message-ID: <[email protected]> > > Signed-off-by: Alistair Francis <[email protected]> > > --- > > MAINTAINERS | 6 + > > docs/system/riscv/microblaze-v-generic.rst | 42 +++++ > > docs/system/target-riscv.rst | 1 + > > hw/riscv/microblaze-v-generic.c | 184 +++++++++++++++++++++ > > hw/riscv/Kconfig | 8 + > > hw/riscv/meson.build | 1 + > > 6 files changed, 242 insertions(+) > > create mode 100644 docs/system/riscv/microblaze-v-generic.rst > > create mode 100644 hw/riscv/microblaze-v-generic.c > > > > +static void mb_v_generic_machine_init(MachineClass *mc) > > +{ > > + mc->desc = "AMD Microblaze-V generic platform"; > > + mc->init = mb_v_generic_init; > > + mc->min_cpus = 1; > > + mc->max_cpus = 1; > > + mc->default_cpu_type = TYPE_RISCV_CPU_BASE; > > Could you use or provide a proper CPU type for this machine? since MicroBlaze-V extensions are FPGA-design-time configurable, the CPU type inherits from `DYNAMIC_CPU` to allow CLI configuration, with sensible defaults for a typical MicroBlaze-V configuration. We need a new type `amd-microblaze-v` that inherits from DYNAMIC_CPU, allowing users to specify extensions via command line matching their design (e.g., `-cpu amd-microblaze-v,m=true,c=true`). Does that sound good? Would you like me to send a patch for it? Regards, Sai Pavan > Regards, Sai Pavan > > > + mc->default_cpus = 1; > > +} >
