This includes REVB, REVH, REVW, RBIT.
Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/tcg/translate-sve.c | 7 +++++++
target/arm/tcg/sve.decode | 5 +++++
2 files changed, 12 insertions(+)
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index 2e138f9ac0..c3903d8fcc 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -836,6 +836,7 @@ static gen_helper_gvec_3 * const sve_rbit_fns[4] = {
gen_helper_sve_rbit_s, gen_helper_sve_rbit_d,
};
TRANS_FEAT(RBIT_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
sve_rbit_fns[a->esz], a, 0)
+TRANS_FEAT(RBIT_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
sve_rbit_fns[a->esz], a, 1)
static gen_helper_gvec_3 * const sve2p1_orqv_fns[4] = {
gen_helper_sve2p1_orqv_b, gen_helper_sve2p1_orqv_h,
@@ -3070,15 +3071,21 @@ static gen_helper_gvec_3 * const revb_fns[4] = {
};
TRANS_FEAT(REVB_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
revb_fns[a->esz], a, 0)
+TRANS_FEAT(REVB_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
+ revb_fns[a->esz], a, 1)
static gen_helper_gvec_3 * const revh_fns[4] = {
NULL, NULL, gen_helper_sve_revh_s, gen_helper_sve_revh_d,
};
TRANS_FEAT(REVH_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
revh_fns[a->esz], a, 0)
+TRANS_FEAT(REVH_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
+ revh_fns[a->esz], a, 1)
TRANS_FEAT(REVW_m, aa64_sme_or_sve, gen_gvec_ool_arg_zpz,
a->esz == 3 ? gen_helper_sve_revw_d : NULL, a, 0)
+TRANS_FEAT(REVW_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
+ a->esz == 3 ? gen_helper_sve_revw_d : NULL, a, 1)
TRANS_FEAT(REVD_m, aa64_sme_or_sve2p1, gen_gvec_ool_arg_zpz,
gen_helper_sme_revd_q, a, 0)
diff --git a/target/arm/tcg/sve.decode b/target/arm/tcg/sve.decode
index e79b5e84c1..867ae2916e 100644
--- a/target/arm/tcg/sve.decode
+++ b/target/arm/tcg/sve.decode
@@ -730,6 +730,11 @@ REVW_m 00000101 .. 1001 10 100 ... ..... .....
@rd_pg_rn
RBIT_m 00000101 .. 1001 11 100 ... ..... ..... @rd_pg_rn
REVD_m 00000101 00 1011 10 100 ... ..... ..... @rd_pg_rn_e0
+REVB_z 00000101 .. 1001 00 101 ... ..... ..... @rd_pg_rn
+REVH_z 00000101 .. 1001 01 101 ... ..... ..... @rd_pg_rn
+REVW_z 00000101 .. 1001 10 101 ... ..... ..... @rd_pg_rn
+RBIT_z 00000101 .. 1001 11 101 ... ..... ..... @rd_pg_rn
+
# SVE vector splice (predicated, destructive)
SPLICE 00000101 .. 101 100 100 ... ..... ..... @rdn_pg_rm
--
2.43.0
