Hi Eric,
On 6/8/2026 2:57 AM, Eric Auger wrote:
Hi Nathan,
On 6/5/26 2:17 AM, Nathan Chen wrote:
Hi,
This is a follow-up to the series [0] that introduces support for
resolving 'auto' for arm-smmuv3 accelerated mode's ATS, RIL, SSIDSIZE,
and OAS feature properties based on host IOMMU capabilities. This is
dependent on the series [1] for changing these property types to accept
'auto' values.
Accelerated SMMUv3 Address Translation Services support is derived from
IDR0, Range Invalidation support is derived from IDR3, Substream ID
size is derived from IDR1, and output address space is derived from
IDR5.
The default values are set to 'auto' for all properties. If accel=off
and the values are set to 'auto' or are omitted and resolve to 'auto',
the default property values defined in smmuv3_init_id_regs() for OAS
and RIL will remain unchanged, while SSIDSIZE and ATS values will
remain initialized at 0.
A complete branch can be found here:
https://github.com/NathanChenNVIDIA/qemu/tree/smmuv3-accel-auto-resolve-v5
I am afraid this requires a rebase on top of laterly landed
https://lore.kernel.org/all/[email protected]/
Thanks for the heads up, I have sent a v6 rebased on top of this.
Nathan
