Add trace events for the CXL Fixed Memory Window address routing path.
This translates a host physical address through interleave granularity
calculation and up to two levels of HDM decoder lookups (host-bridge
and optional switch USP).
Two trace points are added:
cxl_cfmws_lookup - entry to CFMWS decode with the computed
root-bus interleave index
cxl_cfmws_target_resolved - HDM decoder produced a port target (fires
for both host-bridge and switch USP lookups)
In non-passthrough topologies, a cxl_cfmws_lookup without a following
cxl_cfmws_target_resolved indicates the host-bridge HDM decode failed.
Passthrough-mode routing goes through pcie_find_port_first() without
HDM decoding, so no target_resolved event is expected in that case.
A dedicated passthrough-mode trace event is deferred pending upstream
passthrough topology support.
Signed-off-by: Junjie Cao <[email protected]>
---
hw/cxl/cxl-host.c | 4 ++++
hw/cxl/trace-events | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c
index a94b893e99..0efdfcdfa7 100644
--- a/hw/cxl/cxl-host.c
+++ b/hw/cxl/cxl-host.c
@@ -21,6 +21,7 @@
#include "hw/pci/pci_host.h"
#include "hw/pci/pcie_port.h"
#include "hw/pci-bridge/pci_expander_bridge.h"
+#include "trace.h"
static void cxl_fixed_memory_window_config(CXLFixedMemoryWindowOptions *object,
int index, Error **errp)
@@ -169,6 +170,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw,
hwaddr addr)
PCIDevice *rp, *d;
rb_index = (addr / cxl_decode_ig(fw->enc_int_gran)) % fw->num_targets;
+ trace_cxl_cfmws_lookup(addr, rb_index);
hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl_host_bridge);
if (!hb || !hb->bus || !pci_bus_is_cxl(hb->bus)) {
return NULL;
@@ -191,6 +193,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw,
hwaddr addr)
if (!target_found) {
return NULL;
}
+ trace_cxl_cfmws_target_resolved(addr, target);
rp = pcie_find_port_by_pn(hb->bus, target);
if (!rp) {
@@ -227,6 +230,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw,
hwaddr addr)
if (!target_found) {
return NULL;
}
+ trace_cxl_cfmws_target_resolved(addr, target);
d = pcie_find_port_by_pn(&PCI_BRIDGE(d)->sec_bus, target);
if (!d) {
diff --git a/hw/cxl/trace-events b/hw/cxl/trace-events
index 17f9e7059c..0cfaa0c128 100644
--- a/hw/cxl/trace-events
+++ b/hw/cxl/trace-events
@@ -9,3 +9,7 @@ cxl_mailbox_payload_error(uint8_t set, uint8_t cmd, const char
*name, size_t len
cxl_event_insert(int log_type, int occupancy) "log_type=%d occupancy=%d"
cxl_event_overflow(int log_type, uint16_t overflow_count) "log_type=%d
overflow_count=%u"
cxl_event_clear(int log_type, int nr_recs) "log_type=%d nr_recs=%d"
+
+# cxl-host.c
+cxl_cfmws_lookup(uint64_t addr, int rb_index) "addr=0x%"PRIx64" rb_index=%d"
+cxl_cfmws_target_resolved(uint64_t addr, uint8_t target) "addr=0x%"PRIx64"
target=0x%02x"
--
2.43.0
