On 10/6/26 22:54, Daniel Henrique Barboza wrote:
All CPUs have the same amount of triggers: 2 triggers per hart, set via
RV_MAX_TRIGGERS. This is not enough anymore: we'll have at least one
future CPU that will demand more triggers per hart when implementing the
RISC-V Server Ref Platform, requiring at least 11 triggers per hart.
Parametrize the trigger amount using a new 'num_triggers' property. The
default amount is kept at 2 for backwards compatibility. The new
maximum is bumped to a generous 1024 triggers per hart, which hopefully
will be enough for the foreseeable future.
The property can be set in two ways:
- a '.num_triggers' CPU definition flag, allowing CPUs to set a custom
amount inside the CPU def in DEFINE_RISCV_CPU();
- a new 'num-triggers' user property. The user property has a higher
priority than an existing '.num_triggers' CPU def setting.
Assuming a hypothetical case where a CPU 'X' is defined with
'.num_triggers = 8':
- -cpu X,num-triggers=30 => num_triggers set to 30
- -cpu X (...) => num_triggers set to 8
For a CPU that doesn't set '.num_triggers':
- -cpu rv64,num-triggers=30 => num_triggers set to 30
- -cpu rv64 (...) => num_triggers set to 2
Signed-off-by: Daniel Henrique Barboza <[email protected]>
---
target/riscv/cpu.c | 11 +++++++++++
target/riscv/cpu.h | 19 ++++++++++++++++++-
target/riscv/debug.c | 16 ++++++++--------
target/riscv/machine.c | 4 ++--
4 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index b6b53a4840..ba96ceceef 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -240,8 +240,8 @@ static int debug_post_load(void *opaque, int version_id)
static const VMStateDescription vmstate_debug = {
.name = "cpu/debug",
- .version_id = 3,
- .minimum_version_id = 3,
+ .version_id = 4,
+ .minimum_version_id = 4,
This change belong to the previous patch, otherwise:
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
