On 6/15/26 5:58 PM, Michael S. Tsirkin wrote:
On Sun, Jun 14, 2026 at 06:41:57PM -0700, Richard Henderson wrote:
On 6/14/26 10:22, Michael S. Tsirkin wrote:
On Sun, Jun 14, 2026 at 09:45:51AM -0700, Richard Henderson wrote:
On 6/14/26 08:13, Michael S. Tsirkin wrote:
Yes, I think it does work because we use -fno-strict-aliasing.
For bigger sizes we'll need packed because the addresses
could be unaligned.
...
For most host/guest pairs things simply work even for unaligned.
And yes, guest drivers do do this.
On classical pci, there are no transactions as such and
an unaligned access will be split anyway.
I'm saying, if you're talking about pass-through to real devices, that won't
work. For instance, AArch64 will trap unaligned accesses to Device memory.
Presumably, AArch64 drivers don't do unaligned at all then?
Yes.
You need to actually handle unaligned. Perhaps something like
/* Find unit to fit size and alignment of dst */
uintptr_t test = (uintptr_t)dst | size;
uintptr_t lsb = test & -test;
switch (lsb) {
case 1: // loop over uint8_t
case 2: // loop over uint16_t
case 4: // loop over uint32_t
default: // loop over uint64_t
}
with the expectation that normally we'll have aligned addresses and size
such that the loop will iterate once.
r~
And ifdef for arches without unaligned support?
No ifdef. All accesses produced by the above are aligned.
r~
So something like:
#if defined(__i386__) || defined(__x86_64__)
#define HOST_UNALIGNED_MMIO_OK 1
#else
#define HOST_UNALIGNED_MMIO_OK 0
#endif
and then we can check that.
Thanks for all the comments. A new revision (v2) has been sent for further
comments, thanks.
https://lore.kernel.org/qemu-arm/[email protected]/
Thanks,
Gavin
