> On 6/1/26 4:28 PM, Shameer Kolothum Thodi wrote: > > Hi Eric, > > > >> -----Original Message----- > >> From: Eric Auger <[email protected]> > >> Sent: 19 May 2026 14:27 > >> To: [email protected]; [email protected]; qemu- > >> [email protected]; [email protected]; [email protected]; > >> [email protected]; [email protected]; > >> [email protected]; [email protected]; > >> [email protected]; [email protected]; [email protected]; > >> Shameer Kolothum Thodi <[email protected]>; > [email protected] > >> Cc: [email protected]; [email protected]; [email protected]; > >> [email protected]; [email protected]; [email protected]; > >> [email protected] > >> Subject: [PATCH v5 04/18] arm/cpu: Add infra to handle generated ID > register > >> definitions > >> > >> External email: Use caution opening links or attachments > >> > >> > >> The known ID regs are populated in a new initialization function > >> named initialize_cpu_sysreg_properties(). That code will be > >> automatically generated from AARCHMRS Registers.json. For the > >> time being let's just describe a single id reg, CTR_EL0. In this > >> description we only care about non RES/RAZ fields, ie. named fields. > >> > >> The registers are populated in an array indexed by ARMIDRegisterIdx > >> and their fields are added in a sorted list. > >> > >> Signed-off-by: Eric Auger <[email protected]> > >> Signed-off-by: Cornelia Huck <[email protected]> > >> > >> --- > >> > >> v4 -> v5 > >> - ifdef TARGET_ARM_CPU_IDREGS_H > >> - s/g_list_append/g_list_prepend > >> - void arm64_sysreg_add_field() > > Effectively the whole commit desc is outdated now that I have migrated > to Khushit description of idregs and their fields. No need for list nor > > arm64_sysreg_add_field anymore. > > Arrays are populated in [PATCH v5 08/18] target/arm/cpu_idregs: generate > tables for Arm64 ID registers and fields > This is much nicer.
Ah..Got it. Thanks, Shameer
