On 16/6/26 00:18, Josh Hilke wrote:
Introduce register offsets and bitmask constants for the Transmit Rate
Limiter (TRL). Add the IGBTrlQueue structure and corresponding fields to
IGBCore to track TRL state (timers, throttling status, and target rates)
per queue. Initialize and free these timers during the device
realize/uninit lifecycle, and reset them on device reset.
Signed-off-by: Josh Hilke <[email protected]>
---
hw/net/igb_common.h | 1 +
hw/net/igb_core.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++
hw/net/igb_core.h | 13 ++++++++++++
hw/net/igb_regs.h | 6 ++++++
4 files changed, 79 insertions(+)
diff --git a/hw/net/igb_core.h b/hw/net/igb_core.h
index d70b54e..f3d50bc 100644
--- a/hw/net/igb_core.h
+++ b/hw/net/igb_core.h
@@ -63,6 +63,13 @@ typedef struct IGBIntrDelayTimer_st {
IGBCore *core;
} IGBIntrDelayTimer;
+typedef struct IGBTrlQueue_st {
+ QEMUTimer *timer;
+ IGBCore *core;
+ int queue_idx;
+ uint32_t trlrc;
+} IGBTrlQueue;
+
struct IGBCore {
uint32_t mac[E1000E_MAC_SIZE];
uint16_t phy[MAX_PHY_REG_ADDRESS + 1];
@@ -99,6 +106,9 @@ struct IGBCore {
void (*owner_start_recv)(PCIDevice *d);
int64_t timadj;
+
+ /* Transmit Rate Limiting */
+ IGBTrlQueue trl[IGB_NUM_QUEUES];
};
void
@@ -143,4 +153,7 @@ igb_receive_iov(IGBCore *core, const struct iovec *iov, int
iovcnt);
void
igb_start_recv(IGBCore *core);
+bool igb_trl_enabled(uint32_t trlrc);
bool igb_trl_enabled(const IGBTrlQueue *q);
+uint64_t igb_trl_get_target_rate(const IGBTrlQueue *q);
+
#endif
