On 08-05-2026 21:30, Aditya Gupta wrote:
On 26/03/05 12:09AM, Saif Abrar wrote:
Hello,
This patchset v4 resolves the tsan build failure seen in
https://gitlab.com/mstredhat/qemu/-/jobs/13201554945
Few variables were declared directly after a case label inside a switch,
causing the compilation failure.
These are now moved to the top of the block.
This series updates the existing PHB4 model to the latest spec:
"Power Systems Host Bridge 5 (PHB5) Functional Specification Version 0.5_00".
Updates include the following:
- implemented sticky reset logic
- implemented read-only, write-only, W1C and WxC logic
- return all 1's on read to unimplemented registers
- update PCIE registers for link status, speed and width
- implement IODA PCT debug table without any functionality
- update LSI Source-ID register based on small/big PHB number of interrupts
Also, a new testbench for PHB4 model is added that does XSCOM read/writes
to various registers of interest and verifies the values.
Thanks for introducing phb5, saif.
I am currently seeing powernv functional tests failing with the patches
applied:
1/16 qemu:func-thorough+func-ppc64-thorough+thorough / func-ppc64-hv
SKIP 0.17s 0 subtests passed
▶ 2/16 test_powernv.PowernvMachine.test_powernv10
FAIL
▶ 2/16 test_powernv.PowernvMachine.test_powernv11
FAIL
3/16 qemu:func-thorough+func-ppc64-thorough+thorough /
func-ppc64-fadump OK 166.62s 1 subtests passed
▶ 2/16 test_powernv.PowernvMachine.test_powernv9
FAIL
2/16 qemu:func-thorough+func-ppc64-thorough+thorough /
func-ppc64-powernv ERROR 182.93s exit status 1
Able to consistently reproduce it with: 'make check-functional-ppc64 -j4'
Bisect points to below commit:
commit 9b95949d3eb9e733973c692b0e8e0b9043df98e9
Author: Saif Abrar <[email protected]>
Date: Thu Mar 5 00:09:04 2026 -0600
pnv/phb4: Add reset logic to PHB4
Can you fix the above failure ?
Reverted the updates that were causing the regression.
Meanwhile, will be reviewing the series.
Thanks,
- Aditya G
Thanks,
Saif
