Re: [PATCH v4 9/9] pnv/phb4: Mask off LSI Source-ID based on number of interrupts

[Saif Abrar]

On 11-05-2026 14:16, Jishnu Warrier wrote:

On Thu, Mar 05, 2026 at 12:09:11AM -0600, Saif Abrar wrote:

Add a method to reset the value of LSI Source-ID.
Mask off LSI source-id based on number of interrupts in the big/small PHB.

Signed-off-by: Saif Abrar <saif.ab...@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <c...@kaod.org>
---
v3: Updates for coding guidelines.
v2: Introduced method pnv_phb4_xsrc_reset().

  hw/pci-host/pnv_phb4.c | 12 +++++++++---
  1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 254bbe4089..5e885cb89d 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -490,6 +490,7 @@ static void pnv_phb4_update_xsrc(PnvPHB4 *phb)

lsi_base = GETFIELD(PHB_LSI_SRC_ID, phb->regs[PHB_LSI_SOURCE_ID >> 3]);

      lsi_base <<= 3;
+    lsi_base &= (xsrc->nr_irqs - 1);

/* TODO: handle reset values of PHB_LSI_SRC_ID */

      if (!lsi_base) {
@@ -1944,6 +1945,12 @@ static void pnv_phb4_ro_mask_init(PnvPHB4 *phb)
      /* TODO: Add more RO-masks as regs are implemented in the model */
  }

+static void pnv_phb4_xsrc_reset(PnvPHB4 *phb)

+{
+    phb->regs[PHB_LSI_SOURCE_ID >> 3] = PPC_BITMASK(4, 12);

If I am not wrong, according to PHB5 spec page 104, the LSI Source ID field 
should be bits 3-15:
     PPC_BITMASK(3, 15)  // 0x1FF8000000000000ULL
03:12 LSI Source ID(00:09)
RW

13:15 LSI Source ID(10:12)
R0

This patchset is for PHB5. Your observation is about the next version PHB5B.

+    pnv_phb4_update_xsrc(phb);
+}
+
  static void pnv_phb4_err_reg_reset(PnvPHB4 *phb)
  {
      STICKY_RST(PHB_ERR_STATUS,       0, PPC_BITMASK(0, 33));
@@ -2000,10 +2007,11 @@ static void pnv_phb4_reset(Object *obj, ResetType type)
      PnvPHB4 *phb = PNV_PHB4(obj);

pnv_phb4_pbl_core_reset(phb);

+
+    pnv_phb4_xsrc_reset(phb);
      pnv_phb4_err_reg_reset(phb);
      pnv_phb4_pcie_stack_reg_reset(phb);
      pnv_phb4_regb_err_reg_reset(phb);
-    phb->regs[PHB_PCIE_CRESET >> 3] = 0xE000000000000000;
  }

static void pnv_phb4_instance_init(Object *obj)

@@ -2080,8 +2088,6 @@ static void pnv_phb4_realize(DeviceState *dev, Error 
**errp)
          return;
      }

- pnv_phb4_update_xsrc(phb);

-
      phb->qirqs = qemu_allocate_irqs(xive_source_set_irq, xsrc, xsrc->nr_irqs);

pnv_phb4_xscom_realize(phb);

--
2.47.3

Thanks,

Saif