On Thu, 18 Jun 2026 at 11:46, Alex Bennée <[email protected]> wrote: > > CBAR is an IMPDEF register and according to the A9 TRM [1]: > > In Cortex-A9 MPCore implementations, the base address is reset to > PERIPHBASE[31:13] so that software can determine the location of the > private memory region [2]. > > If it doesn't we will confuse the Linux kernel as it probes the system > SCU registers [3] and erroneously assumes the system is a buggy Aegis SOC > and nerf the emission of SEV instructions, deadlocking any WFE's in > the kernel (or QEMU smpboot code). > > [1] > https://developer.arm.com/documentation/ddi0388/i/system-control/register-descriptions/configuration-base-address-register > [2] > https://developer.arm.com/documentation/ddi0407/g/Introduction/Private-Memory-Region > [3] > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/kernel/head.S?h=v7.1#n550 > > Signed-off-by: Alex Bennée <[email protected]> > Suggested-by: Arnd Bergmann <[email protected]>
Cc: [email protected] Fixes: 2d8f048c25ab ("hw/arm: Add NPCM730 and NPCM750 SoC models") Reviewed-by: Peter Maydell <[email protected]> thanks -- PMM
