From: Philippe Mathieu-Daudé <[email protected]> Commit 2a425aae0b5 ("target/arm: ensure PSCI register updates are flushed") manually sets %vcpu_dirty in hvf_handle_exception(), but these calls follow calls to cpu_synchronize_state() which itself sets %vcpu_dirty. Better have the generic CPU API handle this, but add a pair of assertions when serializing the accelerator state to be safe.
Suggested-by: Alex Bennée <[email protected]> Signed-off-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Message-ID: <[email protected]> Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- target/arm/hvf/hvf.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index d88cbe7c82a..a5b30b9ef0d 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -794,6 +794,8 @@ int hvf_arch_get_registers(CPUState *cpu) hv_simd_fp_uchar16_t fpval; int i, n; + assert(!cpu->vcpu_dirty); + for (i = 0; i < ARRAY_SIZE(hvf_reg_match); i++) { ret = hv_vcpu_get_reg(cpu->accel->fd, hvf_reg_match[i].reg, &val); *(uint64_t *)((void *)env + hvf_reg_match[i].offset) = val; @@ -945,6 +947,8 @@ int hvf_arch_put_registers(CPUState *cpu) hv_simd_fp_uchar16_t fpval; int i, n; + assert(cpu->vcpu_dirty); + /* * Set SVCR first because changing it will zero out Z/P (including NEON) * regs @@ -2498,7 +2502,6 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcpu_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call returns -1 */ env->xregs[0] = -1; } - cpu->vcpu_dirty = true; } else { trace_hvf_unknown_hvc(env->pc, env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); @@ -2515,7 +2518,6 @@ static int hvf_handle_exception(CPUState *cpu, hv_vcpu_exit_exception_t *excp) /* SMCCC 1.3 section 5.2 says every unknown SMCCC call returns -1 */ env->xregs[0] = -1; } - cpu->vcpu_dirty = true; } else { trace_hvf_unknown_smc(env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); -- 2.53.0
