Signed-off-by: Mark Cave-Ayland <[email protected]>
---
 include/hw/acpi/ich9.h |   2 +-
 hw/acpi/ich9.c         | 153 +++++++++++++++++++++++++++++++++--------
 hw/isa/lpc_ich9.c      |   3 +-
 3 files changed, 129 insertions(+), 29 deletions(-)

diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 30990fcef5..3180e98c93 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -83,7 +83,7 @@ extern const VMStateDescription vmstate_ich9_pm;
 
 void ich9_pm_reset_properties(ICH9LPCPMRegs *pm);
 
-void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm);
+void ich9_pm_add_class_properties(ObjectClass *oc);
 
 void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
                                 Error **errp);
diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index ac3f452dc3..723a87e6f3 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -339,6 +339,16 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, 
qemu_irq sci_irq)
                              ACPI_MEMORY_HOTPLUG_BASE);
 }
 
+static void ich9_pm_get_io_base(Object *obj, Visitor *v,
+                                const char *name, void *opaque,
+                                Error **errp)
+{
+    ICH9LPCState *lpc = ICH9_LPC_DEVICE(obj);
+    uint32_t pm_io_base = lpc->pm.pm_io_base;
+
+    visit_type_uint32(v, name, &pm_io_base, errp);
+}
+
 static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
                                  void *opaque, Error **errp)
 {
@@ -349,6 +359,84 @@ static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, 
const char *name,
     visit_type_uint32(v, name, &value, errp);
 }
 
+static void ich9_pm_get_s3_disabled(Object *obj, Visitor *v,
+                                    const char *name, void *opaque,
+                                    Error **errp)
+{
+    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+    ICH9LPCPMRegs *pm = &s->pm;
+    uint8_t s3_disabled = pm->disable_s3;
+
+    visit_type_uint8(v, name, &s3_disabled, errp);
+}
+
+static void ich9_pm_set_s3_disabled(Object *obj, Visitor *v,
+                                    const char *name, void *opaque,
+                                    Error **errp)
+{
+    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+    ICH9LPCPMRegs *pm = &s->pm;
+    uint8_t s3_disabled = pm->disable_s3;
+
+    if (!visit_type_uint8(v, name,  &s3_disabled, errp)) {
+        return;
+    }
+
+    pm->disable_s3 = s3_disabled;
+}
+
+static void ich9_pm_get_s4_disabled(Object *obj, Visitor *v,
+                                    const char *name, void *opaque,
+                                    Error **errp)
+{
+    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+    ICH9LPCPMRegs *pm = &s->pm;
+    uint8_t s4_disabled = pm->disable_s4;
+
+    visit_type_uint8(v, name, &s4_disabled, errp);
+}
+
+static void ich9_pm_set_s4_disabled(Object *obj, Visitor *v,
+                                    const char *name, void *opaque,
+                                    Error **errp)
+{
+    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+    ICH9LPCPMRegs *pm = &s->pm;
+    uint8_t s4_disabled = pm->disable_s4;
+
+    if (!visit_type_uint8(v, name,  &s4_disabled, errp)) {
+        return;
+    }
+
+    pm->disable_s4 = s4_disabled;
+}
+
+static void ich9_pm_get_s4_val(Object *obj, Visitor *v,
+                               const char *name, void *opaque,
+                               Error **errp)
+{
+    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+    ICH9LPCPMRegs *pm = &s->pm;
+    uint8_t s4_val = pm->s4_val;
+
+    visit_type_uint8(v, name, &s4_val, errp);
+}
+
+static void ich9_pm_set_s4_val(Object *obj, Visitor *v,
+                               const char *name, void *opaque,
+                               Error **errp)
+{
+    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
+    ICH9LPCPMRegs *pm = &s->pm;
+    uint8_t s4_val = pm->s4_val;
+
+    if (!visit_type_uint8(v, name,  &s4_val, errp)) {
+        return;
+    }
+
+    pm->s4_val = s4_val;
+}
+
 static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
 {
     ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
@@ -400,36 +488,47 @@ void ich9_pm_reset_properties(ICH9LPCPMRegs *pm)
     pm->enable_tco = true;
 }
 
-void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
+void ich9_pm_add_class_properties(ObjectClass *oc)
 {
     static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
 
-    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
-                                   &pm->pm_io_base, OBJ_PROP_FLAG_READ);
-    object_property_add_link(obj, "bus", TYPE_PCI_BUS,
-                             (Object **)&pm->acpi_pci_hotplug.root,
-                             object_property_allow_set_link,
-                             OBJ_PROP_LINK_STRONG);
-    object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
-                        ich9_pm_get_gpe0_blk,
-                        NULL, NULL, NULL);
-    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
-                                   &gpe0_len, OBJ_PROP_FLAG_READ);
-    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
-                                  &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
-    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
-                                  &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
-    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
-                                  &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
-    object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
-                             ich9_pm_get_enable_tco,
-                             ich9_pm_set_enable_tco);
-    object_property_add_bool(obj, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
-                             ich9_pm_get_acpi_pci_hotplug,
-                             ich9_pm_set_acpi_pci_hotplug);
-    object_property_add_bool(obj, "x-keep-pci-slot-hpc",
-                             ich9_pm_get_keep_pci_slot_hpc,
-                             ich9_pm_set_keep_pci_slot_hpc);
+    object_class_property_add(oc, ACPI_PM_PROP_PM_IO_BASE, "uint32",
+                              ich9_pm_get_io_base,
+                              NULL,
+                              NULL, NULL);
+    object_class_property_add_link(oc, "bus",
+                                   TYPE_PCI_BUS,
+                                   offsetof(ICH9LPCState,
+                                            pm.acpi_pci_hotplug.root),
+                                   object_property_allow_set_link,
+                                   OBJ_PROP_LINK_STRONG);
+    object_class_property_add(oc, ACPI_PM_PROP_GPE0_BLK, "uint32",
+                              ich9_pm_get_gpe0_blk,
+                              NULL,
+                              NULL, NULL);
+    object_class_property_add_uint32_ptr(oc, ACPI_PM_PROP_GPE0_BLK_LEN,
+                                         &gpe0_len, OBJ_PROP_FLAG_READ);
+    object_class_property_add(oc, ACPI_PM_PROP_S3_DISABLED, "uint8",
+                              ich9_pm_get_s3_disabled,
+                              ich9_pm_set_s3_disabled,
+                              NULL, NULL);
+    object_class_property_add(oc, ACPI_PM_PROP_S4_DISABLED, "uint8",
+                              ich9_pm_get_s4_disabled,
+                              ich9_pm_set_s4_disabled,
+                              NULL, NULL);
+    object_class_property_add(oc, ACPI_PM_PROP_S4_VAL, "uint8",
+                              ich9_pm_get_s4_val,
+                              ich9_pm_set_s4_val,
+                              NULL, NULL);
+    object_class_property_add_bool(oc, ACPI_PM_PROP_TCO_ENABLED,
+                                  ich9_pm_get_enable_tco,
+                                  ich9_pm_set_enable_tco);
+    object_class_property_add_bool(oc, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
+                                   ich9_pm_get_acpi_pci_hotplug,
+                                   ich9_pm_set_acpi_pci_hotplug);
+    object_class_property_add_bool(oc, "x-keep-pci-slot-hpc",
+                                   ich9_pm_get_keep_pci_slot_hpc,
+                                   ich9_pm_set_keep_pci_slot_hpc);
 }
 
 void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index c6d31a3957..13aa05b221 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -689,7 +689,6 @@ static void ich9_lpc_initfn(Object *obj)
                              IOAPIC_NUM_PINS);
 
     ich9_pm_reset_properties(&lpc->pm);
-    ich9_pm_add_properties(obj, &lpc->pm);
 }
 
 static void ich9_lpc_realize(PCIDevice *d, Error **errp)
@@ -950,6 +949,8 @@ static void ich9_lpc_class_init(ObjectClass *klass, const 
void *data)
                               ich9_lpc_get_smi_negotiated_feat,
                               ich9_lpc_set_smi_negotiated_feat,
                               NULL, NULL);
+
+    ich9_pm_add_class_properties(klass);
 }
 
 static const TypeInfo ich9_lpc_info = {
-- 
2.43.0


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