From: Cornelia Huck <[email protected]> We now have the infrastructure in place to handle demuxed ID registers from kvm. Use it to get the values that kvm emulates for CCSIDR_EL1.
Tested-by: Alireza Sanaee <[email protected]> Signed-off-by: Cornelia Huck <[email protected]> Signed-off-by: Sebastian Ott <[email protected]> --- target/arm/kvm.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index a54ef51ec2..059d361d88 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -244,6 +244,33 @@ static int get_host_cpu_reg(int fd, ARMHostCPUFeatures *ahcf, return ret; } + +/* CSSELR values; used to index KVM_REG_ARM_DEMUX_ID_CCSIDR */ +#define CSSELR_MAX 14 + +static int get_host_cpu_reg_demux(int fd, ARMHostCPUFeatures *ahcf, + ARMIDRegisterIdx index, int subindex) +{ + + struct kvm_one_reg one_reg = { + .id = KVM_REG_ARM64 | KVM_REG_SIZE_U32 | KVM_REG_ARM_DEMUX, + }; + + switch (index) { + case CCSIDR_EL1_IDX: + if (subindex >= CSSELR_MAX) { + return -EINVAL; + } + one_reg.id |= KVM_REG_ARM_DEMUX_ID_CCSIDR | subindex; + one_reg.addr = (uintptr_t)&ahcf->isar.idregs[index + subindex]; + break; + default: + return -EINVAL; + } + + return ioctl(fd, KVM_GET_ONE_REG, &one_reg); +} + static uint32_t kvm_arm_sve_get_vls(int fd) { uint64_t vls[KVM_ARM64_SVE_VLS_WORDS]; @@ -286,6 +313,7 @@ static void kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) bool pmu_supported = false; uint64_t features = 0; int err; + int i; ahcf->target = QEMU_KVM_ARM_TARGET_NONE; ahcf->dtb_compatible = "arm,armv8"; @@ -454,6 +482,10 @@ static void kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) /* Read the set of supported vector lengths. */ arm_host_cpu_features.sve_vq_supported = kvm_arm_sve_get_vls(fd); } + /* Grab demuxed registers. */ + for (i = 0; i < CSSELR_MAX; i++) { + err |= get_host_cpu_reg_demux(fd, ahcf, CCSIDR_EL1_IDX, i); + } } kvm_arm_destroy_scratch_host_vcpu(fdarray); -- 2.54.0
