On 22/6/26 21:05, Josh Hilke wrote:
Introduce register offsets and bitmask constants for the Transmit Rate
Limiter (TRL). Add the IGBTrlQueue structure and corresponding fields to
IGBCore to track TRL state (timers, throttling status, and target rates)
per queue. Initialize and free these timers during the device
realize/uninit lifecycle, and reset them on device reset.
Signed-off-by: Josh Hilke <[email protected]>
---
hw/net/igb_common.h | 1 +
hw/net/igb_core.c | 41 +++++++++++++++++++++++++++++++++++++++++
hw/net/igb_core.h | 12 ++++++++++++
hw/net/igb_regs.h | 5 +++++
4 files changed, 59 insertions(+)
diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h
index 4dc4c31..4c31e4b 100644
--- a/hw/net/igb_regs.h
+++ b/hw/net/igb_regs.h
@@ -718,4 +718,9 @@ static inline uint8_t igb_ivar_entry_tx(uint8_t i)
return i < 8 ? i * 4 + 1 : (i - 8) * 4 + 3;
}
+/* Transmit Rate Limiting */
+#define E1000_TRLDQSEL 0x03604
+#define E1000_TRLRC 0x036B0
+#define E1000_TRLRC_RS_ENA BIT(31)
I haven't checked the datasheet for these values, but for the rest
of modelling:
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
