On 6/23/2026 8:02 AM, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé <[email protected]>

In order to avoid symbol name clash when building
a single binary, rename TCG helpers prefixing with
the target name.

Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>

Reviewed-by: Daniel Henrique Barboza <[email protected]>

---
  target/loongarch/tcg/helper.h                    | 2 +-
  target/riscv/helper.h                            | 2 +-
  target/loongarch/tcg/fpu_helper.c                | 2 +-
  target/riscv/fpu_helper.c                        | 2 +-
  target/riscv/translate.c                         | 2 +-
  target/loongarch/tcg/insn_trans/trans_fmov.c.inc | 2 +-
  6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/target/loongarch/tcg/helper.h b/target/loongarch/tcg/helper.h
index 35b055eb3bc..154e70c0191 100644
--- a/target/loongarch/tcg/helper.h
+++ b/target/loongarch/tcg/helper.h
@@ -91,7 +91,7 @@ DEF_HELPER_2(ftint_w_d, i64, env, i64)
  DEF_HELPER_2(frint_s, i64, env, i64)
  DEF_HELPER_2(frint_d, i64, env, i64)
-DEF_HELPER_FLAGS_1(set_rounding_mode, TCG_CALL_NO_RWG, void, env)
+DEF_HELPER_FLAGS_1(loongarch_set_rounding_mode, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_1(rdtime_d, i64, env) diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index 542b7c264fc..6f46e0d91d4 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -2,7 +2,7 @@
  DEF_HELPER_2(raise_exception, noreturn, env, i32)
/* Floating Point - rounding mode */
-DEF_HELPER_FLAGS_2(set_rounding_mode, TCG_CALL_NO_WG, void, env, i32)
+DEF_HELPER_FLAGS_2(riscv_set_rounding_mode, TCG_CALL_NO_WG, void, env, i32)
  DEF_HELPER_FLAGS_2(set_rounding_mode_chkfrm, TCG_CALL_NO_WG, void, env, i32)
/* Floating Point - fused */
diff --git a/target/loongarch/tcg/fpu_helper.c 
b/target/loongarch/tcg/fpu_helper.c
index fc9c64c20a8..265f608cddd 100644
--- a/target/loongarch/tcg/fpu_helper.c
+++ b/target/loongarch/tcg/fpu_helper.c
@@ -878,7 +878,7 @@ uint64_t helper_ftint_w_d(CPULoongArchState *env, uint64_t 
fj)
      return fd;
  }
-void helper_set_rounding_mode(CPULoongArchState *env)
+void helper_loongarch_set_rounding_mode(CPULoongArchState *env)
  {
      set_float_rounding_mode(ieee_rm[(env->fcsr0 >> FCSR0_RM) & 0x3],
                              &env->fp_status);
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c
index db1475271b6..88261b223cc 100644
--- a/target/riscv/fpu_helper.c
+++ b/target/riscv/fpu_helper.c
@@ -66,7 +66,7 @@ void riscv_cpu_check_fflags(CPURISCVState *env,
                              FloatExceptionFlags pre_fflag) {}
  #endif
-void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm)
+void helper_riscv_set_rounding_mode(CPURISCVState *env, uint32_t rm)
  {
      FloatRoundMode softrm;
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 9684dbe7528..d5c3366fd94 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -759,7 +759,7 @@ static void gen_set_rm(DisasContext *ctx, uint8_t rm)
/* The helper may raise ILLEGAL_INSN -- record binv for unwind. */
      decode_save_opc(ctx, 0);
-    gen_helper_set_rounding_mode(tcg_env, tcg_constant_i32(rm));
+    gen_helper_riscv_set_rounding_mode(tcg_env, tcg_constant_i32(rm));
  }
static void gen_set_rm_chkfrm(DisasContext *ctx, uint8_t rm)
diff --git a/target/loongarch/tcg/insn_trans/trans_fmov.c.inc 
b/target/loongarch/tcg/insn_trans/trans_fmov.c.inc
index 5cbd9d3f347..c4c4c2000f7 100644
--- a/target/loongarch/tcg/insn_trans/trans_fmov.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_fmov.c.inc
@@ -112,7 +112,7 @@ static bool trans_movgr2fcsr(DisasContext *ctx, 
arg_movgr2fcsr *a)
       * Note that FCSR3 is exactly the rounding mode field.
       */
      if (mask & FCSR0_M3) {
-        gen_helper_set_rounding_mode(tcg_env);
+        gen_helper_loongarch_set_rounding_mode(tcg_env);
      }
      return true;
  }


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